arch/arm64/kvm/hyp/nvhe/sys_regs.c

354

p->regval = ICC_SRE_EL1_DIB | ICC_SRE_EL1_DFB | ICC_SRE_EL1_SRE;

arch/arm64/kvm/hyp/vgic-v3-sr.c

298

write_gicreg(ICC_SRE_EL1_SRE, ICC_SRE_EL1);

arch/arm64/kvm/hyp/vgic-v3-sr.c

500

val = (val & ICC_SRE_EL1_SRE) ? 0 : (1ULL << 63);

arch/arm64/kvm/vgic-sys-reg-v3.c

284

if (!(val & ICC_SRE_EL1_SRE))

arch/arm64/kvm/vgic/vgic-v3.c

492

ICC_SRE_EL1_SRE);

include/linux/irqchip/arm-gic-v3.h

650

if (val & ICC_SRE_EL1_SRE)

include/linux/irqchip/arm-gic-v3.h

653

val |= ICC_SRE_EL1_SRE;

include/linux/irqchip/arm-gic-v3.h

657

return !!(val & ICC_SRE_EL1_SRE);

tools/testing/selftests/kvm/lib/arm64/gic_v3.c

344

write_sysreg_s(read_sysreg_s(SYS_ICC_SRE_EL1) | ICC_SRE_EL1_SRE,