arch/x86/kvm/lapic.c

1729

(APIC_REG_MASK(first) * ((1ull << (count)) - 1))

arch/x86/kvm/lapic.c

1735

APIC_REG_MASK(APIC_ID) |

arch/x86/kvm/lapic.c

1736

APIC_REG_MASK(APIC_LVR) |

arch/x86/kvm/lapic.c

1737

APIC_REG_MASK(APIC_TASKPRI) |

arch/x86/kvm/lapic.c

1738

APIC_REG_MASK(APIC_PROCPRI) |

arch/x86/kvm/lapic.c

1739

APIC_REG_MASK(APIC_LDR) |

arch/x86/kvm/lapic.c

1740

APIC_REG_MASK(APIC_SPIV) |

arch/x86/kvm/lapic.c

1744

APIC_REG_MASK(APIC_ESR) |

arch/x86/kvm/lapic.c

1745

APIC_REG_MASK(APIC_ICR) |

arch/x86/kvm/lapic.c

1746

APIC_REG_MASK(APIC_LVTT) |

arch/x86/kvm/lapic.c

1747

APIC_REG_MASK(APIC_LVTTHMR) |

arch/x86/kvm/lapic.c

1748

APIC_REG_MASK(APIC_LVTPC) |

arch/x86/kvm/lapic.c

1749

APIC_REG_MASK(APIC_LVT0) |

arch/x86/kvm/lapic.c

1750

APIC_REG_MASK(APIC_LVT1) |

arch/x86/kvm/lapic.c

1751

APIC_REG_MASK(APIC_LVTERR) |

arch/x86/kvm/lapic.c

1752

APIC_REG_MASK(APIC_TMICT) |

arch/x86/kvm/lapic.c

1753

APIC_REG_MASK(APIC_TMCCT) |

arch/x86/kvm/lapic.c

1754

APIC_REG_MASK(APIC_TDCR);

arch/x86/kvm/lapic.c

1757

valid_reg_mask |= APIC_REG_MASK(APIC_LVTCMCI);

arch/x86/kvm/lapic.c

1761

valid_reg_mask |= APIC_REG_MASK(APIC_ARBPRI) |

arch/x86/kvm/lapic.c

1762

APIC_REG_MASK(APIC_DFR) |

arch/x86/kvm/lapic.c

1763

APIC_REG_MASK(APIC_ICR2);

arch/x86/kvm/lapic.c

1785

!(kvm_lapic_readable_reg_mask(apic) & APIC_REG_MASK(offset)))