APIC_LVT0
v = apic_read(APIC_LVT0);
apic_write(APIC_LVT0, v | APIC_LVT_MASKED);
apic_write(APIC_LVT0, APIC_LVT_MASKED);
apic_write(APIC_LVT0, APIC_DM_EXTINT);
value = apic_read(APIC_LVT0) & APIC_LVT_MASKED;
apic_write(APIC_LVT0, value);
value = apic_read(APIC_LVT0);
apic_write(APIC_LVT0, value);
apic_write(APIC_LVT0, APIC_LVT_MASKED);
apic_pm_state.apic_lvt0 = apic_read(APIC_LVT0);
apic_write(APIC_LVT0, apic_pm_state.apic_lvt0);
unsigned long v = apic_read(APIC_LVT0);
apic_write(APIC_LVT0, v | APIC_LVT_MASKED);
unsigned long v = apic_read(APIC_LVT0);
apic_write(APIC_LVT0, v & ~APIC_LVT_MASKED);
apic_write(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_EXTINT);
apic_write(APIC_LVT0, APIC_DM_FIXED | cfg->vector); /* Fixed mode */
apic_write(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_FIXED | cfg->vector);
apic_write(APIC_LVT0, APIC_DM_EXTINT);
v = apic_read(APIC_LVT0);
case APIC_LVT0:
case APIC_LVT0:
APIC_REG_MASK(APIC_LVT0) |
case APIC_LVT0:
kvm_lapic_set_reg(apic, APIC_LVT0,
apic_manage_nmi_watchdog(apic, kvm_lapic_get_reg(apic, APIC_LVT0));
kvm_apic_local_deliver(apic, APIC_LVT0);
u32 lvt0 = kvm_lapic_get_reg(vcpu->arch.apic, APIC_LVT0);
apic_manage_nmi_watchdog(apic, kvm_lapic_get_reg(apic, APIC_LVT0));
X2APIC_MSR(APIC_LVT0),
case APIC_LVT0: