APIC_ID
if (reg == APIC_DFR || reg == APIC_ID || reg == APIC_LDR ||
u32 reg = apic_read(APIC_ID);
boot_cpu_physical_apicid = native_apic_msr_read(APIC_ID);
u32 apicid = native_apic_msr_read(APIC_ID);
apic_pm_state.apic_id = apic_read(APIC_ID);
apic_write(APIC_ID, apic_pm_state.apic_id);
v = apic_read(APIC_ID);
apic_set_reg(ap, APIC_ID, native_apic_msr_read(APIC_ID));
case APIC_ID:
APIC_REG_MASK(APIC_ID) |
case APIC_ID: /* Local APIC ID */
u32 *id = (u32 *)(s->regs + APIC_ID);
kvm_lapic_set_reg(apic, APIC_ID, id << 24);
kvm_lapic_set_reg(apic, APIC_ID, id);
return kvm_lapic_get_reg(apic, APIC_ID) >> 24;
X2APIC_MSR(APIC_ID),
case APIC_ID:
if (reg != APIC_ID)
ret = do_sched_yield(GET_APIC_ID_FIELD(xapic_read_reg(APIC_ID)));
xapic_write_reg(APIC_ID, 1 << 24);
xapic_write_reg(APIC_ID, 1 << 24);
GUEST_ASSERT_EQ(xapic_read_reg(APIC_ID), 1 << 24);
data->halter_apic_id = GET_APIC_ID_FIELD(xapic_read_reg(APIC_ID));
apic_id = *((u32 *)&xapic.regs[APIC_ID]);
*(u32 *)(lapic.regs + APIC_ID) = i << 24;
TEST_ASSERT(*((u32 *)&lapic.regs[APIC_ID]) == vcpu->id << 24,