arch/x86/events/core.c

1724

apic_write(APIC_LVTPC, APIC_DM_NMI);

arch/x86/events/core.c

1766

apic_write(APIC_LVTPC, APIC_DM_NMI);

arch/x86/events/core.c

1783

apic_write(APIC_LVTPC, APIC_DM_NMI);

arch/x86/events/intel/core.c

3686

apic_write(APIC_LVTPC, APIC_DM_NMI);

arch/x86/events/intel/core.c

3723

apic_write(APIC_LVTPC, APIC_DM_NMI);

arch/x86/events/intel/core.c

3736

apic_write(APIC_LVTPC, APIC_DM_NMI);

arch/x86/events/intel/p4.c

1092

apic_write(APIC_LVTPC, APIC_DM_NMI);

arch/x86/events/zhaoxin/core.c

364

apic_write(APIC_LVTPC, APIC_DM_NMI);

arch/x86/kernel/apic/apic.c

1348

value = APIC_DM_NMI;

arch/x86/kernel/apic/apic.c

1628

value = APIC_DM_NMI;

arch/x86/kernel/apic/apic.c

1630

value = APIC_DM_NMI | APIC_LVT_MASKED;

arch/x86/kernel/apic/apic_numachip.c

90

dmode = (vector == NMI_VECTOR) ? APIC_DM_NMI : APIC_DM_FIXED;

arch/x86/kernel/apic/local.h

38

icr |= APIC_DM_NMI;

arch/x86/kernel/apic/x2apic_savic.c

164

icr_low |= APIC_DM_NMI;

arch/x86/kernel/apic/x2apic_savic.c

177

nmi = ((icr_low & APIC_DM_FIXED_MASK) == APIC_DM_NMI);

arch/x86/kernel/kvm.c

540

icr = APIC_DM_NMI;

arch/x86/kvm/lapic.c

1451

case APIC_DM_NMI:

arch/x86/kvm/lapic.c

591

return (lvt_val & (APIC_MODE_MASK | APIC_LVT_MASKED)) == APIC_DM_NMI;

arch/x86/platform/uv/uv_nmi.c

1046

value = apic_read(APIC_LVT1) | APIC_DM_NMI;

arch/x86/platform/uv/uv_nmi.c

603

__apic_send_IPI_mask(uv_nmi_cpu_mask, APIC_DM_NMI);

arch/x86/xen/smp.c

193

case APIC_DM_NMI: /* Some use that instead of NMI_VECTOR */

tools/testing/selftests/kvm/x86/svm_nested_soft_inject_test.c

112

x2apic_write_reg(APIC_ICR, APIC_DEST_SELF | APIC_INT_ASSERT | APIC_DM_NMI);