IA_CSS_PIPE_ID_NUM
for (i = 0; i < IA_CSS_PIPE_ID_NUM; i++)
if (asd->params.s3a_enabled_pipe != IA_CSS_PIPE_ID_NUM)
for (i = 0; i < IA_CSS_PIPE_ID_NUM; i++)
for (i = 0; i < IA_CSS_PIPE_ID_NUM; i++)
for (i = 0; i < IA_CSS_PIPE_ID_NUM; i++)
for (j = 0; j < IA_CSS_PIPE_ID_NUM; j++) {
for (j = 0; j < IA_CSS_PIPE_ID_NUM; j++) {
for (j = 0; j < IA_CSS_PIPE_ID_NUM; j++) {
struct ia_css_pipe *multi_pipes[IA_CSS_PIPE_ID_NUM];
for (i = 0; i < IA_CSS_PIPE_ID_NUM; i++) {
for (i = 0; i < IA_CSS_PIPE_ID_NUM; i++) {
if (pipe_id < 0 || pipe_id >= IA_CSS_PIPE_ID_NUM) {
if (pipe_id >= IA_CSS_PIPE_ID_NUM)
for (j = 0; j < IA_CSS_PIPE_ID_NUM; j++) {
if (j < IA_CSS_PIPE_ID_NUM)
j = IA_CSS_PIPE_ID_NUM;
struct ia_css_pipe *pipes[IA_CSS_PIPE_ID_NUM];
struct ia_css_pipe *multi_pipes[IA_CSS_PIPE_ID_NUM];
struct ia_css_pipe_config pipe_configs[IA_CSS_PIPE_ID_NUM];
struct ia_css_pipe_extra_config pipe_extra_configs[IA_CSS_PIPE_ID_NUM];
bool update_pipe[IA_CSS_PIPE_ID_NUM];
if (WARN_ON(css_pipe_id >= IA_CSS_PIPE_ID_NUM))
asd->params.s3a_enabled_pipe = IA_CSS_PIPE_ID_NUM;
unsigned int s3a_bufs_in_css[IA_CSS_PIPE_ID_NUM];
[ATOMISP_INPUT_STREAM_NUM][IA_CSS_PIPE_ID_NUM];
if ((!val) || (key >= IA_CSS_PIPELINE_NUM_MAX) || (key >= IA_CSS_PIPE_ID_NUM)) {
if ((key >= IA_CSS_PIPELINE_NUM_MAX) || (key >= IA_CSS_PIPE_ID_NUM)) {
struct ia_css_pipe *pipes[IA_CSS_PIPE_ID_NUM];
struct ia_css_pipe **orig_pipes[IA_CSS_PIPE_ID_NUM];
struct ia_css_pipe_config pipe_config[IA_CSS_PIPE_ID_NUM];
assert(pipe_id < IA_CSS_PIPE_ID_NUM);
pipe_id >= IA_CSS_PIPE_ID_NUM) {
#define NR_OF_PIPELINES IA_CSS_PIPE_ID_NUM /* Must match with IA_CSS_PIPE_ID_NUM */
static ia_css_ptr xmem_sp_stage_ptrs[IA_CSS_PIPE_ID_NUM]
static ia_css_ptr xmem_isp_stage_ptrs[IA_CSS_PIPE_ID_NUM]
assert(pipe->mode < IA_CSS_PIPE_ID_NUM);
if ((pipe->mode < IA_CSS_PIPE_ID_NUM) &&
for (i = 0; i < IA_CSS_PIPE_ID_NUM; i++) {
if ((pipe->mode < IA_CSS_PIPE_ID_NUM) &&
for (i = 0; i < IA_CSS_PIPE_ID_NUM; i++) {
for (i = 0; i < IA_CSS_PIPE_ID_NUM; i++) {
for (i = 0; i < IA_CSS_PIPE_ID_NUM; i++) {
for (p = 0; p < IA_CSS_PIPE_ID_NUM; p++) {
for (i = 0; i < IA_CSS_PIPE_ID_NUM; i++) {
for (p = 0; p < IA_CSS_PIPE_ID_NUM; p++)
for (i = 0; i < IA_CSS_PIPE_ID_NUM; i++) {
for (i = 0; i < IA_CSS_PIPE_ID_NUM; i++) {
[IA_CSS_PIPE_ID_NUM][SH_CSS_MAX_STAGES][IA_CSS_NUM_MEMORIES];
bool pipe_dpc_config_changed[IA_CSS_PIPE_ID_NUM];
bool pipe_dvs_6axis_config_changed[IA_CSS_PIPE_ID_NUM];
struct sh_css_ddr_address_map pipe_ddr_ptrs[IA_CSS_PIPE_ID_NUM];
struct sh_css_ddr_address_map_size pipe_ddr_ptrs_size[IA_CSS_PIPE_ID_NUM];
struct ia_css_dp_config pipe_dp_config[IA_CSS_PIPE_ID_NUM];
struct ia_css_dvs_6axis_config *pipe_dvs_6axis_config[IA_CSS_PIPE_ID_NUM];
for (i = 0; i < IA_CSS_PIPE_ID_NUM; i++) {
assert(IA_CSS_PIPE_ID_NUM == NR_OF_PIPELINES);
if (pipe_num >= IA_CSS_PIPE_ID_NUM)
assert(IA_CSS_PIPE_ID_NUM == NR_OF_PIPELINES);
if (pipe_num >= IA_CSS_PIPE_ID_NUM)