IB_WR_ATOMIC_FETCH_AND_ADD
user_wr->opcode == IB_WR_ATOMIC_FETCH_AND_ADD) {
case IB_WR_ATOMIC_FETCH_AND_ADD:
case IB_WR_ATOMIC_FETCH_AND_ADD:
case IB_WR_ATOMIC_FETCH_AND_ADD:
[IB_WR_ATOMIC_FETCH_AND_ADD] = {
opcode == IB_WR_ATOMIC_FETCH_AND_ADD) {
wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD) &&
wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD) {
wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD)) {
wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD)
case IB_WR_ATOMIC_FETCH_AND_ADD:
wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD) {
case IB_WR_ATOMIC_FETCH_AND_ADD:
[IB_WR_ATOMIC_FETCH_AND_ADD] = IB_WC_FETCH_ADD,
case IB_WR_ATOMIC_FETCH_AND_ADD:
wr->opcode == IB_WR_ATOMIC_FETCH_AND_ADD) {
case IB_WR_ATOMIC_FETCH_AND_ADD:
case IB_WR_ATOMIC_FETCH_AND_ADD:
case IB_WR_ATOMIC_FETCH_AND_ADD:
case IB_WR_ATOMIC_FETCH_AND_ADD:
[IB_WR_ATOMIC_FETCH_AND_ADD] = cpu_to_be32(MLX4_OPCODE_ATOMIC_FA),
[IB_WR_ATOMIC_FETCH_AND_ADD] = MLX5_OPCODE_ATOMIC_FA,
case IB_WR_ATOMIC_FETCH_AND_ADD:
case IB_WR_ATOMIC_FETCH_AND_ADD:
[IB_WR_ATOMIC_FETCH_AND_ADD] = MTHCA_OPCODE_ATOMIC_FA,
case IB_WR_ATOMIC_FETCH_AND_ADD:
case IB_WR_ATOMIC_FETCH_AND_ADD:
case IB_WR_ATOMIC_FETCH_AND_ADD:
if (wr->opcode == IB_WR_ATOMIC_FETCH_AND_ADD) {
case IB_WR_ATOMIC_FETCH_AND_ADD:
case IB_WR_ATOMIC_FETCH_AND_ADD:
case IB_WR_ATOMIC_FETCH_AND_ADD:
(wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD) ?
case IB_WR_ATOMIC_FETCH_AND_ADD: return IB_WC_FETCH_ADD;
wqe->wr.opcode != IB_WR_ATOMIC_FETCH_AND_ADD)
[IB_WR_ATOMIC_FETCH_AND_ADD] = {
case IB_WR_ATOMIC_FETCH_AND_ADD:
case IB_WR_ATOMIC_FETCH_AND_ADD:
case IB_WR_ATOMIC_FETCH_AND_ADD: