I40E_PFINT_ICR0_ENA
wr32(hw, I40E_PFINT_ICR0_ENA, 0);
{I40E_PFINT_ICR0_ENA, 0xF7F20000, 1, 0},
val = rd32(hw, I40E_PFINT_ICR0_ENA);
wr32(hw, I40E_PFINT_ICR0_ENA, val);
reg = rd32(hw, I40E_PFINT_ICR0_ENA);
wr32(hw, I40E_PFINT_ICR0_ENA, reg);
wr32(hw, I40E_PFINT_ICR0_ENA, 0);
wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */
wr32(hw, I40E_PFINT_ICR0_ENA, val);
wr32(hw, I40E_PFINT_ICR0_ENA, 0);
wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
u32 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
wr32(hw, I40E_PFINT_ICR0_ENA, reg);
wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
regval = rd32(hw, I40E_PFINT_ICR0_ENA);
wr32(hw, I40E_PFINT_ICR0_ENA, regval);
reg = rd32(hw, I40E_PFINT_ICR0_ENA);
wr32(hw, I40E_PFINT_ICR0_ENA, reg);