IA32_ECX
EMIT2(0x89, add_2reg(0xC0, IA32_ECX, IA32_EAX));
EMIT2(0x01, add_2reg(0xC0, IA32_ECX, IA32_EAX));
EMIT2(0x01, add_2reg(0xC0, IA32_ECX, IA32_EDX));
EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_ECX),
EMIT2(0x89, add_2reg(0xC0, dst_hi, IA32_ECX));
EMIT2(0x89, add_2reg(0xC0, IA32_ECX, IA32_EAX));
EMIT2(0x01, add_2reg(0xC0, IA32_ECX, IA32_EAX));
EMIT2(0x01, add_2reg(0xC0, IA32_ECX, IA32_EDX));
EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_ECX),
EMIT2(0x89, add_2reg(0xC0, dst_hi, IA32_ECX));
EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX), STACK_VAR(tcc[0]));
EMIT3(0x83, add_1reg(0xF8, IA32_ECX), lo);
EMIT3(0x83, add_1reg(0xC0, IA32_ECX), 0x01);
EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_ECX), STACK_VAR(tcc[0]));
EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX), STACK_VAR(src_hi));
EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX), STACK_VAR(src_lo));
EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX), STACK_VAR(src_lo));
const u8 arg_regs[] = { IA32_EAX, IA32_EDX, IA32_ECX };
EMIT2_off32(0xC7, add_1reg(0xC0, IA32_ECX),
emit_ia32_mul_r(dst_lo, IA32_ECX, dstk,
EMIT2_off32(0xC7, add_1reg(0xC0, IA32_ECX),
IA32_ECX, dstk, false,
EMIT2_off32(0xC7, add_1reg(0xC0, IA32_ECX),
IA32_ECX, dstk, false,
EMIT2_off32(0xC7, add_1reg(0xC0, IA32_ECX), imm32);
emit_ia32_shift_r(BPF_OP(code), dst_lo, IA32_ECX, dstk,
u8 sreg_lo = sstk ? IA32_ECX : src_lo;
EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX),
u8 sreg_lo = sstk ? IA32_ECX : src_lo;
EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX),
u8 sreg_lo = sstk ? IA32_ECX : src_lo;
EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX),
u8 sreg_lo = IA32_ECX;
u8 sreg_lo = IA32_ECX;
EMIT2_off32(0xC7, add_1reg(0xC0, IA32_ECX), imm32);
u8 sreg_lo = IA32_ECX;
EMIT2_off32(0xC7, add_1reg(0xC0, IA32_ECX), imm32);
u8 sreg = sstk ? IA32_ECX : src;
EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX), STACK_VAR(src));
EMIT2(0x89, add_2reg(0xC0, IA32_ECX, dreg_hi));
EMIT2(0x89, add_2reg(0xC0, dreg_lo, IA32_ECX));
EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX),
else if (src != IA32_ECX)
EMIT2(0x8B, add_2reg(0xC0, src, IA32_ECX));
EMIT2(0xF7, add_1reg(0xF0, IA32_ECX));
EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX), STACK_VAR(src));
else if (src != IA32_ECX)
EMIT2(0x8B, add_2reg(0xC0, src, IA32_ECX));
EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX),
EMIT2(0x8B, add_2reg(0xC0, src_lo, IA32_ECX));
EMIT3(0x83, add_1reg(0xF8, IA32_ECX), 32);
EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX),
EMIT2(0x8B, add_2reg(0xC0, src_lo, IA32_ECX));
EMIT3(0x83, add_1reg(0xF8, IA32_ECX), 32);
EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX),
EMIT2(0x8B, add_2reg(0xC0, src_lo, IA32_ECX));
EMIT3(0x83, add_1reg(0xF8, IA32_ECX), 32);