IA32_EBX
EMIT2(0x31, add_2reg(0xC0, IA32_EBX, IA32_EBX));
EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EBX), STACK_VAR(fphi));
EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EBX), STACK_VAR(r1[1]));
EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EBX), STACK_VAR(tcc[0]));
EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EBX), STACK_VAR(tcc[1]));
EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EBX), -12);
EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EBX), STACK_VAR(tcc[1]));
EMIT3(0x83, add_1reg(0xF8, IA32_EBX), hi);
EMIT3(0x83, add_1reg(0xD0, IA32_EBX), 0x00);
EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EBX), STACK_VAR(tcc[1]));
u8 sreg_hi = sstk ? IA32_EBX : src_hi;
IA32_EBX),
u8 sreg_hi = sstk ? IA32_EBX : src_hi;
IA32_EBX),
u8 sreg_hi = sstk ? IA32_EBX : src_hi;
IA32_EBX),
u8 sreg_hi = IA32_EBX;
u8 sreg_hi = IA32_EBX;
EMIT2_off32(0xC7, add_1reg(0xC0, IA32_EBX), hi);
u8 sreg_hi = IA32_EBX;
EMIT2_off32(0xC7, add_1reg(0xC0, IA32_EBX), hi);