drivers/gpu/drm/i915/display/intel_display.h

82

for ((__p) = PLANE_PRIMARY; (__p) < I915_MAX_PLANES; (__p)++) \

drivers/gpu/drm/i915/display/intel_display_types.h

1249

int plane_min_cdclk[I915_MAX_PLANES];

drivers/gpu/drm/i915/display/intel_display_types.h

1252

u32 data_rate[I915_MAX_PLANES];

drivers/gpu/drm/i915/display/intel_display_types.h

1254

u32 data_rate_y[I915_MAX_PLANES];

drivers/gpu/drm/i915/display/intel_display_types.h

1257

u64 rel_data_rate[I915_MAX_PLANES];

drivers/gpu/drm/i915/display/intel_display_types.h

1258

u64 rel_data_rate_y[I915_MAX_PLANES];

drivers/gpu/drm/i915/display/intel_display_types.h

857

struct skl_plane_wm planes[I915_MAX_PLANES];

drivers/gpu/drm/i915/display/intel_display_types.h

876

u16 plane[I915_MAX_PLANES];

drivers/gpu/drm/i915/display/intel_display_types.h

933

struct skl_ddb_entry plane_ddb[I915_MAX_PLANES];

drivers/gpu/drm/i915/display/intel_display_types.h

935

struct skl_ddb_entry plane_ddb_y[I915_MAX_PLANES];

drivers/gpu/drm/i915/display/intel_display_types.h

941

u16 plane_min_ddb[I915_MAX_PLANES];

drivers/gpu/drm/i915/display/intel_display_types.h

942

u16 plane_interim_ddb[I915_MAX_PLANES];

drivers/gpu/drm/i915/display/intel_frontbuffer.c

243

BUILD_BUG_ON(I915_MAX_PLANES > INTEL_FRONTBUFFER_BITS_PER_PIPE);

drivers/gpu/drm/i915/display/intel_plane.c

816

struct skl_ddb_entry ddb[I915_MAX_PLANES],

drivers/gpu/drm/i915/display/intel_plane.c

817

struct skl_ddb_entry ddb_y[I915_MAX_PLANES],

drivers/gpu/drm/i915/display/intel_plane.c

837

ddb, I915_MAX_PLANES, plane_id) ||

drivers/gpu/drm/i915/display/intel_plane.c

839

ddb_y, I915_MAX_PLANES, plane_id))

drivers/gpu/drm/i915/display/intel_plane.c

948

struct skl_ddb_entry ddb[I915_MAX_PLANES];

drivers/gpu/drm/i915/display/intel_plane.c

949

struct skl_ddb_entry ddb_y[I915_MAX_PLANES];

drivers/gpu/drm/i915/display/intel_wm_types.h

27

u16 plane[I915_MAX_PLANES];

drivers/gpu/drm/i915/display/intel_wm_types.h

38

u8 plane[I915_MAX_PLANES];

drivers/gpu/drm/i915/display/skl_watermark.c

3881

struct skl_ddb_entry ddb[I915_MAX_PLANES];

drivers/gpu/drm/i915/display/skl_watermark.c

3882

struct skl_ddb_entry ddb_y[I915_MAX_PLANES];

drivers/gpu/drm/i915/display/skl_watermark.c

3883

u16 min_ddb[I915_MAX_PLANES];

drivers/gpu/drm/i915/display/skl_watermark.c

3884

u16 interim_ddb[I915_MAX_PLANES];

drivers/gpu/drm/i915/gvt/reg.h

88

(PLANE_SPRITE0) : (I915_MAX_PLANES))); })