arch/mips/include/asm/i8259.h

90

return likely(irq >= 0) ? irq + I8259A_IRQ_BASE : irq;

arch/mips/include/asm/irq.h

49

return ((irq == I8259A_IRQ_BASE + 2) ? I8259A_IRQ_BASE + 9 : irq);

arch/mips/include/asm/mach-cobalt/irq.h

26

#define PCISLOT_IRQ (I8259A_IRQ_BASE + 9)

arch/mips/include/asm/mach-generic/irq.h

16

#ifndef I8259A_IRQ_BASE

arch/mips/include/asm/txx9irq.h

18

#define TXX9_IRQ_BASE (I8259A_IRQ_BASE + 16)

arch/mips/mti-malta/malta-int.c

179

WARN(irq_alloc_descs(I8259A_IRQ_BASE, I8259A_IRQ_BASE,

arch/mips/mti-malta/malta-int.c

181

"Cannot reserve i8259 virqs at IRQ%d\n", I8259A_IRQ_BASE);

arch/mips/txx9/generic/pci.c

249

if (unlikely(isairq <= I8259A_IRQ_BASE))

drivers/irqchip/irq-i8259.c

136

unsigned int irqmask, irq = d->irq - I8259A_IRQ_BASE;

drivers/irqchip/irq-i8259.c

247

outb_p(I8259A_IRQ_BASE + 0, PIC_MASTER_IMR); /* ICW2: 8259A-1 IR0 mapped to I8259A_IRQ_BASE + 0x00 */

drivers/irqchip/irq-i8259.c

255

outb_p(I8259A_IRQ_BASE + 8, PIC_SLAVE_IMR); /* ICW2: 8259A-2 IR0 mapped to I8259A_IRQ_BASE + 0x08 */

drivers/irqchip/irq-i8259.c

312

int irq = I8259A_IRQ_BASE + PIC_CASCADE_IR;

drivers/irqchip/irq-i8259.c

320

domain = irq_domain_create_legacy(of_fwnode_handle(node), 16, I8259A_IRQ_BASE, 0,

drivers/irqchip/irq-i8259.c

70

unsigned int mask, irq = d->irq - I8259A_IRQ_BASE;

drivers/irqchip/irq-i8259.c

85

unsigned int mask, irq = d->irq - I8259A_IRQ_BASE;