I2C
NODE_CHK("ipg", clks[MPC512x_CLK_I2C], 0, I2C);
INTC_GROUP(I2C, I2C_ALI, I2C_TACKI, I2C_WAITI, I2C_DTEI),
{ 0xa408001c, 0, 16, 4, /* IPRH */ { MSIOF, 0, FLCTL, I2C } },
INTC_GROUP(I2C, I2C_ALI, I2C_TACKI, I2C_WAITI, I2C_DTEI),
{ 0xa408001c, 0, 16, 4, /* IPRH */ { SIOF0, SIOF1, FLCTL, I2C } },
INTC_GROUP(I2C,I2C_ALI,I2C_TACKI,I2C_WAITI,I2C_DTEI),
{ 0xa408001c, 0, 16, 4, /* IPRH */ { MSIOF_MSIOFI0,MSIOF_MSIOFI1, FLCTL, I2C } },
INTC_VECT(HUDI, 0x600), INTC_VECT(I2C, 0x620),
DMAC, I2C, HUDI, SPDIF, IPI, HAC, TMU, GPIO } },
{ 0xffe00004, 0, 32, 8, /* INT2PRI1 */ { IPI, SPDIF, HUDI, I2C } },
PXA25X_PBUS95_CKEN("pxa2xx-i2c.0", NULL, I2C, 1, 3, 0),
PXA27X_PBUS_CKEN("pxa2xx-i2c.0", NULL, I2C, 2, 19, 0),
PXA3XX_PBUS_CKEN("pxa2xx-i2c.0", NULL, I2C, 2, 5, 1, 19, 0),
I2C("i2c1", mux_pllp_clkm, CLK_SOURCE_I2C1, 12, tegra_clk_i2c1),
I2C("i2c2", mux_pllp_clkm, CLK_SOURCE_I2C2, 54, tegra_clk_i2c2),
I2C("i2c3", mux_pllp_clkm, CLK_SOURCE_I2C3, 67, tegra_clk_i2c3),
I2C("i2c4", mux_pllp_clkm, CLK_SOURCE_I2C4, 103, tegra_clk_i2c4),
I2C("i2c5", mux_pllp_clkm, CLK_SOURCE_I2C5, 47, tegra_clk_i2c5),
I2C("i2c6", mux_pllp_clkm, CLK_SOURCE_I2C6, 166, tegra_clk_i2c6),
I2C("vii2c", mux_pllp_pllc_clkm, CLK_SOURCE_VI_I2C, 208, tegra_clk_vi_i2c),
BCM281XX_PIN_SHIFT(I2C, PULL_UP_STR),
BCM281XX_PIN_MASK(I2C, PULL_UP_STR));
BCM281XX_PIN_SHIFT(I2C, PULL_UP_STR),
BCM281XX_PIN_MASK(I2C, PULL_UP_STR));
BCM281XX_PIN_SHIFT(I2C, SLEW),
BCM281XX_PIN_MASK(I2C, SLEW));
BCM281XX_PIN_SHIFT(I2C, INPUT_DIS),
BCM281XX_PIN_MASK(I2C, INPUT_DIS));
MFP_FALCON(GPIO39, I2C, GPIO, NONE, NONE),
MFP_FALCON(GPIO40, I2C, GPIO, NONE, NONE),
GRP_MUX("i2c", I2C, pins_i2c),
K210_PC_DEFAULT(I2C),
K210_FUNC(I2C0_SCLK, I2C),
K210_FUNC(I2C0_SDA, I2C),
K210_FUNC(I2C1_SCLK, I2C),
K210_FUNC(I2C1_SDA, I2C),
K210_FUNC(I2C2_SCLK, I2C),
K210_FUNC(I2C2_SDA, I2C),
K210_FUNC(INTERNAL14, I2C),
LAN9645X_P(2, GPIO, SPI, SI_Sa, I2C, NONE, NONE, NONE, PHY_DBG);
LAN9645X_P(3, GPIO, SPI, SI_Sa, I2C, MIIM_Sa, NONE, NONE, PHY_DBG);
LAN9645X_P(4, GPIO, RGMII, TWI_SCL_M, I2C, NONE, NONE, SI_Sa, PHY_DBG);
LAN9645X_P(5, GPIO, RGMII, TWI_SCL_M, I2C, NONE, NONE, SI_Sa, PHY_DBG);
LAN9645X_P(30, GPIO, PTP0, I2C, UART, NONE, NONE, NONE, R);
LAN9645X_P(44, GPIO, MIIM, I2C, NONE, NONE, NONE, NONE, R);
LAN9645X_P(45, GPIO, MIIM, I2C, NONE, NONE, NONE, NONE, R);
TH1520_PAD(9, I2C_AON_SCL, I2C, ____, ____, GPIO, ____, ____, 0),
TH1520_PAD(10, I2C_AON_SDA, I2C, ____, ____, GPIO, ____, ____, 0),
TH1520_PAD(1, QSPI1_CSN0, QSPI, ____, I2C, GPIO, FUSE, ____, 0),
TH1520_PAD(2, QSPI1_D0_MOSI, QSPI, ISO, I2C, GPIO, FUSE, ____, 0),
TH1520_PAD(6, I2C0_SCL, I2C, ____, ____, GPIO, ____, ____, 0),
TH1520_PAD(7, I2C0_SDA, I2C, ____, ____, GPIO, ____, ____, 0),
TH1520_PAD(8, I2C1_SCL, I2C, ____, ____, GPIO, ____, ____, 0),
TH1520_PAD(9, I2C1_SDA, I2C, ____, ____, GPIO, ____, ____, 0),
TH1520_PAD(18, GPIO0_18, GPIO, I2C, ____, ____, DPU0, DPU1, 0),
TH1520_PAD(19, GPIO0_19, GPIO, I2C, ____, ____, DPU0, DPU1, 0),
TH1520_PAD(22, GPIO0_22, GPIO, JTAG, I2C, ____, DPU0, DPU1, 0),
TH1520_PAD(23, GPIO0_23, GPIO, JTAG, I2C, ____, DPU0, DPU1, 0),
TH1520_PAD(27, GPIO0_27, GPIO, ____, I2C, ____, DPU0, DPU1, 0),
TH1520_PAD(28, GPIO0_28, GPIO, ____, I2C, ____, DPU0, DPU1, 0),
TH1520_PAD(9, I2C2_SCL, I2C, UART, ____, GPIO, ____, ____, 0),
TH1520_PAD(10, I2C2_SDA, I2C, UART, ____, GPIO, ____, ____, 0),
TH1520_PAD(11, I2C3_SCL, I2C, ____, ____, GPIO, ____, ____, 0),
TH1520_PAD(12, I2C3_SDA, I2C, ____, ____, GPIO, ____, ____, 0),
TH1520_PAD(45, GMAC0_TXD3, MAC0, I2C, ____, GPIO, ____, ____, 0),
TH1520_PAD(46, GMAC0_RXDV, MAC0, I2C, ____, GPIO, ____, ____, 0),
TH1520_PAD(47, GMAC0_RXD0, MAC0, I2C, ____, GPIO, ____, ____, 0),
TH1520_PAD(48, GMAC0_RXD1, MAC0, I2C, ____, GPIO, ____, ____, 0),
SEC_PD(I2C, 0),
u8 reg = vga_mm_rcrt(par->io_virt, I2C) & DDC_MASK_TGUI;
vga_mm_wcrt(par->io_virt, I2C, reg);
u8 reg = vga_mm_rcrt(par->io_virt, I2C) & DDC_MASK_TGUI;
vga_mm_wcrt(par->io_virt, I2C, reg);
return !!(vga_mm_rcrt(par->io_virt, I2C) & DDC_SDA_TGUI);
reg = vga_mm_rcrt(par->io_virt, I2C) & DDC_MASK;
vga_mm_wcrt(par->io_virt, I2C, reg);
reg = vga_mm_rcrt(par->io_virt, I2C) & DDC_MASK;
vga_mm_wcrt(par->io_virt, I2C, reg);
return !!(vga_mm_rcrt(par->io_virt, I2C) & DDC_SCL_IN);
return !!(vga_mm_rcrt(par->io_virt, I2C) & DDC_SDA_IN);
devm_regmap_init_i2c(clt, &cs35l41_regmap_i2c), I2C);