drivers/media/pci/hws/hws_irq.c

199

readl(pdx->bar0_base + HWS_REG_INT_STATUS));

drivers/media/pci/hws/hws_irq.c

204

int_state = readl_relaxed(pdx->bar0_base + HWS_REG_INT_STATUS);

drivers/media/pci/hws/hws_irq.c

206

writel(int_state, pdx->bar0_base + HWS_REG_INT_STATUS);

drivers/media/pci/hws/hws_irq.c

207

(void)readl_relaxed(pdx->bar0_base + HWS_REG_INT_STATUS);

drivers/media/pci/hws/hws_irq.c

211

int_state = readl_relaxed(pdx->bar0_base + HWS_REG_INT_STATUS);

drivers/media/pci/hws/hws_irq.c

253

writel(vbit, pdx->bar0_base + HWS_REG_INT_STATUS);

drivers/media/pci/hws/hws_irq.c

254

(void)readl_relaxed(pdx->bar0_base + HWS_REG_INT_STATUS);

drivers/media/pci/hws/hws_irq.c

258

int_state = readl_relaxed(pdx->bar0_base + HWS_REG_INT_STATUS);

drivers/media/pci/hws/hws_pci.c

162

int_status = readl(hws->bar0_base + HWS_REG_INT_STATUS);

drivers/media/pci/hws/hws_pci.c

341

(void)readl(hws->bar0_base + HWS_REG_INT_STATUS); /* flush posted writes */

drivers/media/pci/hws/hws_pci.c

368

u32 st = readl(hws->bar0_base + HWS_REG_INT_STATUS);

drivers/media/pci/hws/hws_pci.c

371

writel(st, hws->bar0_base + HWS_REG_INT_STATUS); /* W1C */

drivers/media/pci/hws/hws_pci.c

372

(void)readl(hws->bar0_base + HWS_REG_INT_STATUS);

drivers/media/pci/hws/hws_pci.c

600

(void)readl(hws->bar0_base + HWS_REG_INT_STATUS); /* flush */

drivers/media/pci/hws/hws_pci.c

609

writel(ackmask, hws->bar0_base + HWS_REG_INT_STATUS);

drivers/media/pci/hws/hws_pci.c

610

(void)readl(hws->bar0_base + HWS_REG_INT_STATUS);

drivers/media/pci/hws/hws_video.c

1224

(void)readl(hws->bar0_base + HWS_REG_INT_STATUS);

drivers/media/pci/hws/hws_video.c

588

(void)readl(hws->bar0_base + HWS_REG_INT_STATUS);

drivers/media/pci/hws/hws_video.c

593

u32 st = readl(hws->bar0_base + HWS_REG_INT_STATUS);

drivers/media/pci/hws/hws_video.c

596

writel(st, hws->bar0_base + HWS_REG_INT_STATUS); /* W1C */

drivers/media/pci/hws/hws_video.c

597

(void)readl(hws->bar0_base + HWS_REG_INT_STATUS);

drivers/media/pci/hws/hws_video.c

885

readl(pdx->bar0_base + HWS_REG_INT_STATUS);