arch/mips/include/asm/r4kcache.h

179

return protected_cache_op(Hit_Writeback_Inv_D, addr);

arch/mips/include/asm/r4kcache.h

244

__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 16, )

arch/mips/include/asm/r4kcache.h

247

__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 32, )

arch/mips/include/asm/r4kcache.h

251

__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 64, )

arch/mips/include/asm/r4kcache.h

254

__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 128, )

arch/mips/include/asm/r4kcache.h

277

__BUILD_BLAST_USER_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D,

arch/mips/include/asm/r4kcache.h

280

__BUILD_BLAST_USER_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D,

arch/mips/include/asm/r4kcache.h

283

__BUILD_BLAST_USER_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D,

arch/mips/include/asm/r4kcache.h

304

__BUILD_BLAST_CACHE_RANGE(d, dcache, Hit_Writeback_Inv_D, protected_, )

arch/mips/include/asm/r4kcache.h

309

__BUILD_BLAST_CACHE_RANGE(d, dcache, Hit_Writeback_Inv_D, , )

arch/mips/include/asm/r4kcache.h

90

cache_op(Hit_Writeback_Inv_D, addr);

arch/mips/kvm/vz.c

1120

case Hit_Writeback_Inv_D: