arch/mips/include/asm/r4kcache.h

167

return protected_cache_op(Hit_Invalidate_I, addr);

arch/mips/include/asm/r4kcache.h

245

__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 16, )

arch/mips/include/asm/r4kcache.h

248

__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 32, )

arch/mips/include/asm/r4kcache.h

252

__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 64, )

arch/mips/include/asm/r4kcache.h

255

__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 128, )

arch/mips/include/asm/r4kcache.h

279

__BUILD_BLAST_USER_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 16)

arch/mips/include/asm/r4kcache.h

282

__BUILD_BLAST_USER_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 32)

arch/mips/include/asm/r4kcache.h

285

__BUILD_BLAST_USER_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 64)

arch/mips/include/asm/r4kcache.h

305

__BUILD_BLAST_CACHE_RANGE(i, icache, Hit_Invalidate_I, protected_, )

arch/mips/include/asm/r4kcache.h

310

__BUILD_BLAST_CACHE_RANGE(i, icache, Hit_Invalidate_I, , )

arch/mips/include/asm/r4kcache.h

83

cache_op(Hit_Invalidate_I, addr);

arch/mips/kvm/vz.c

1118

case Hit_Invalidate_I: