HW_PTR
queue->rx_bmu_ctl = (HW_PTR) ADDR(B0_R1_CSR) ;
queue->rx_bmu_dsc = (HW_PTR) ADDR(B4_R1_DA) ;
queue->rx_bmu_ctl = (HW_PTR) ADDR(B0_R2_CSR) ;
queue->rx_bmu_dsc = (HW_PTR) ADDR(B4_R2_DA) ;
queue->tx_bmu_ctl = (HW_PTR) ADDR(B0_XS_CSR) ;
queue->tx_bmu_dsc = (HW_PTR) ADDR(B5_XS_DA) ;
queue->tx_bmu_ctl = (HW_PTR) ADDR(B0_XA_CSR) ;
queue->tx_bmu_dsc = (HW_PTR) ADDR(B5_XA_DA) ;
smc->hw.fp.fm_st1u = (HW_PTR) ADDR(B0_ST1U) ;
smc->hw.fp.fm_st1l = (HW_PTR) ADDR(B0_ST1L) ;
smc->hw.fp.fm_st2u = (HW_PTR) ADDR(B0_ST2U) ;
smc->hw.fp.fm_st2l = (HW_PTR) ADDR(B0_ST2L) ;
smc->hw.fp.fm_st3u = (HW_PTR) ADDR(B0_ST3U) ;
smc->hw.fp.fm_st3l = (HW_PTR) ADDR(B0_ST3L) ;
HW_PTR rx_bmu_ctl ; /* BMU addr for rx start */
HW_PTR rx_bmu_dsc ; /* BMU addr for curr dsc. */
#ifndef HW_PTR
HW_PTR fm_st1u ;
HW_PTR fm_st1l ;
HW_PTR fm_st2u ;
HW_PTR fm_st2l ;
HW_PTR fm_st3u ;
HW_PTR fm_st3l ;
HW_PTR tx_bmu_ctl ; /* BMU addr for tx start */
HW_PTR tx_bmu_dsc ; /* BMU addr for curr dsc. */
#ifndef HW_PTR
HW_PTR iop ; /* IO base address */
HW_PTR port ;
port = (HW_PTR) (PLC(p,PL_CNTRL_B)) ;