Symbol: HVS_READ
drivers/gpu/drm/vc4/vc4_crtc.c
135
val = HVS_READ(SCALER6_DISPX_STATUS(channel));
drivers/gpu/drm/vc4/vc4_crtc.c
137
val = HVS_READ(SCALER_DISPSTATX(channel));
drivers/gpu/drm/vc4/vc4_crtc.c
493
WARN_ON_ONCE(!(HVS_READ(SCALER6_CONTROL) & SCALER6_CONTROL_HVS_EN));
drivers/gpu/drm/vc4/vc4_crtc.c
495
WARN_ON_ONCE(!(HVS_READ(SCALER_DISPCTRL) & SCALER_DISPCTRL_ENABLE));
drivers/gpu/drm/vc4/vc4_crtc.c
836
current_dlist = VC4_GET_FIELD(HVS_READ(SCALER6_DISPX_DL(chan)),
drivers/gpu/drm/vc4/vc4_crtc.c
839
current_dlist = HVS_READ(SCALER_DISPLACTX(chan));
drivers/gpu/drm/vc4/vc4_crtc.c
94
dispbase = HVS_READ(SCALER6_DISPX_COB(channel));
drivers/gpu/drm/vc4/vc4_crtc.c
98
dispbase = HVS_READ(SCALER_DISPBASEX(channel));
drivers/gpu/drm/vc4/vc4_drv.h
664
HVS_READ(hvs->vc4->gen == VC4_GEN_6_C ? SCALER6_ ## offset : SCALER6D_ ## offset)
drivers/gpu/drm/vc4/vc4_hvs.c
1003
HVS_READ(SCALER6_DISPX_CTRL1(channel)) |
drivers/gpu/drm/vc4/vc4_hvs.c
1007
HVS_READ(SCALER6_DISPX_CTRL1(channel)) &
drivers/gpu/drm/vc4/vc4_hvs.c
1014
HVS_READ(SCALER_DISPBKGNDX(channel)) |
drivers/gpu/drm/vc4/vc4_hvs.c
1031
u32 dispbkgndx = HVS_READ(SCALER_DISPBKGNDX(channel));
drivers/gpu/drm/vc4/vc4_hvs.c
1069
dispctrl = HVS_READ(SCALER_DISPCTRL);
drivers/gpu/drm/vc4/vc4_hvs.c
1091
dispctrl = HVS_READ(SCALER_DISPCTRL);
drivers/gpu/drm/vc4/vc4_hvs.c
1135
status = HVS_READ(SCALER_DISPSTAT);
drivers/gpu/drm/vc4/vc4_hvs.c
1136
control = HVS_READ(SCALER_DISPCTRL);
drivers/gpu/drm/vc4/vc4_hvs.c
1232
dlist_size = HVS_READ(SCALER6_CXM_SIZE);
drivers/gpu/drm/vc4/vc4_hvs.c
1309
dispctrl = HVS_READ(SCALER_DISPCTRL);
drivers/gpu/drm/vc4/vc4_hvs.c
1313
reg = HVS_READ(SCALER_DISPECTRL);
drivers/gpu/drm/vc4/vc4_hvs.c
1318
reg = HVS_READ(SCALER_DISPCTRL);
drivers/gpu/drm/vc4/vc4_hvs.c
1323
reg = HVS_READ(SCALER_DISPEOLN);
drivers/gpu/drm/vc4/vc4_hvs.c
1328
reg = HVS_READ(SCALER_DISPDITHER);
drivers/gpu/drm/vc4/vc4_hvs.c
1333
dispctrl = HVS_READ(SCALER_DISPCTRL);
drivers/gpu/drm/vc4/vc4_hvs.c
1654
if (VC4_GET_FIELD(HVS_READ(SCALER6_VERSION), SCALER6_VERSION) ==
drivers/gpu/drm/vc4/vc4_hvs.c
254
dispstat = VC4_GET_FIELD(HVS_READ(SCALER_DISPSTATX(i)),
drivers/gpu/drm/vc4/vc4_hvs.c
265
for (j = HVS_READ(SCALER_DISPLISTX(i)); j < dlist_mem_size; j++) {
drivers/gpu/drm/vc4/vc4_hvs.c
298
dispstat = VC4_GET_FIELD(HVS_READ(SCALER6_DISPX_STATUS(i)),
drivers/gpu/drm/vc4/vc4_hvs.c
308
active_dlist = VC4_GET_FIELD(HVS_READ(SCALER6_DISPX_DL(i)),
drivers/gpu/drm/vc4/vc4_hvs.c
489
field = VC4_GET_FIELD(HVS_READ(SCALER6_DISPX_STATUS(fifo)),
drivers/gpu/drm/vc4/vc4_hvs.c
495
field = VC4_GET_FIELD(HVS_READ(SCALER_DISPSTAT1),
drivers/gpu/drm/vc4/vc4_hvs.c
499
field = VC4_GET_FIELD(HVS_READ(SCALER_DISPSTAT1),
drivers/gpu/drm/vc4/vc4_hvs.c
503
field = VC4_GET_FIELD(HVS_READ(SCALER_DISPSTAT2),
drivers/gpu/drm/vc4/vc4_hvs.c
511
field = VC4_GET_FIELD(HVS_READ(SCALER_DISPSTAT1),
drivers/gpu/drm/vc4/vc4_hvs.c
515
field = VC4_GET_FIELD(HVS_READ(SCALER_DISPSTAT1),
drivers/gpu/drm/vc4/vc4_hvs.c
519
field = VC4_GET_FIELD(HVS_READ(SCALER_DISPSTAT2),
drivers/gpu/drm/vc4/vc4_hvs.c
561
reg = HVS_READ(SCALER_DISPECTRL);
drivers/gpu/drm/vc4/vc4_hvs.c
569
reg = HVS_READ(SCALER_DISPCTRL);
drivers/gpu/drm/vc4/vc4_hvs.c
577
reg = HVS_READ(SCALER_DISPEOLN);
drivers/gpu/drm/vc4/vc4_hvs.c
585
reg = HVS_READ(SCALER_DISPDITHER);
drivers/gpu/drm/vc4/vc4_hvs.c
647
dispbkgndx = HVS_READ(SCALER_DISPBKGNDX(chan));
drivers/gpu/drm/vc4/vc4_hvs.c
702
disp_ctrl1 = HVS_READ(SCALER6_DISPX_CTRL1(chan));
drivers/gpu/drm/vc4/vc4_hvs.c
731
if (!(HVS_READ(SCALER_DISPCTRLX(chan)) & SCALER_DISPCTRLX_ENABLE))
drivers/gpu/drm/vc4/vc4_hvs.c
738
WARN_ON_ONCE(HVS_READ(SCALER_DISPCTRLX(chan)) & SCALER_DISPCTRLX_RESET);
drivers/gpu/drm/vc4/vc4_hvs.c
740
WARN_ON_ONCE(VC4_GET_FIELD(HVS_READ(SCALER_DISPSTATX(chan)),
drivers/gpu/drm/vc4/vc4_hvs.c
744
WARN_ON_ONCE((HVS_READ(SCALER_DISPSTATX(chan)) &
drivers/gpu/drm/vc4/vc4_hvs.c
763
if (!(HVS_READ(SCALER6_DISPX_CTRL0(chan)) & SCALER6_DISPX_CTRL0_ENB))
drivers/gpu/drm/vc4/vc4_hvs.c
767
HVS_READ(SCALER6_DISPX_CTRL0(chan)) | SCALER6_DISPX_CTRL0_RESET);
drivers/gpu/drm/vc4/vc4_hvs.c
770
HVS_READ(SCALER6_DISPX_CTRL0(chan)) & ~SCALER6_DISPX_CTRL0_ENB);
drivers/gpu/drm/vc4/vc4_hvs.c
772
WARN_ON_ONCE(VC4_GET_FIELD(HVS_READ(SCALER6_DISPX_STATUS(chan)),
drivers/gpu/drm/vc4/vc4_kms.c
248
dispctrl = HVS_READ(SCALER_DISPCTRL) &
drivers/gpu/drm/vc4/vc4_kms.c
277
VC4_GET_FIELD(HVS_READ(SCALER_DISPCTRL),
drivers/gpu/drm/vc4/vc4_kms.c
281
reg = HVS_READ(SCALER_DISPECTRL);
drivers/gpu/drm/vc4/vc4_kms.c
293
reg = HVS_READ(SCALER_DISPCTRL);
drivers/gpu/drm/vc4/vc4_kms.c
305
reg = HVS_READ(SCALER_DISPEOLN);
drivers/gpu/drm/vc4/vc4_kms.c
318
reg = HVS_READ(SCALER_DISPDITHER);
drivers/gpu/drm/vc4/vc4_kms.c
371
reg = HVS_READ(SCALER6_CONTROL);