HIFN_1_DMA_CSR
hifn_read_1(dev, HIFN_1_DMA_CSR);
hifn_write_1(dev, HIFN_1_DMA_CSR, HIFN_DMACSR_C_CTRL_ENA);
hifn_write_1(dev, HIFN_1_DMA_CSR, HIFN_DMACSR_S_CTRL_ENA);
hifn_write_1(dev, HIFN_1_DMA_CSR, HIFN_DMACSR_R_CTRL_ENA);
hifn_write_1(dev, HIFN_1_DMA_CSR, HIFN_DMACSR_D_CTRL_ENA);
hifn_write_1(dev, HIFN_1_DMA_CSR, r);
dmacsr = hifn_read_1(dev, HIFN_1_DMA_CSR);
hifn_write_1(dev, HIFN_1_DMA_CSR, dmacsr & dev->dmareg);
hifn_write_1(dev, HIFN_1_DMA_CSR, dmacsr & (HIFN_DMACSR_R_OVER |
hifn_write_1(dev, HIFN_1_DMA_CSR,
hifn_write_1(dev, HIFN_1_DMA_CSR,
hifn_write_1(dev, HIFN_1_DMA_CSR,