HI
{ AA32(HI), Op1( 0), CRn( 1), CRm((n)), Op2( 1), \
{ AA32(HI), Op1( 0), CRn( 1), CRm( 0), Op2( 3), access_actlr, NULL, ACTLR_EL1 },
{ AA32(HI), Op1( 0), CRn( 2), CRm( 0), Op2( 3), access_vm_reg, NULL, TCR_EL1 },
{ AA32(HI), Op1( 0), CRn( 6), CRm( 0), Op2( 2), access_vm_reg, NULL, FAR_EL1 },
{ CP15_PMU_SYS_REG(HI, 0, 9, 14, 4), .access = access_pmceid },
{ CP15_PMU_SYS_REG(HI, 0, 9, 14, 5), .access = access_pmceid },
{ AA32(HI), Op1( 0), CRn(10), CRm( 2), Op2( 1), access_vm_reg, NULL, MAIR_EL1 },
{ AA32(HI), Op1( 0), CRn(10), CRm( 3), Op2( 1), access_vm_reg, NULL, AMAIR_EL1 },
data[1] = HI(mod_chunk->start);
data[3] = HI(attack_duration);
data[4] = HI(initial_level);
data[6] = HI(fade_duration);
data[7] = HI(final_level);
data[1] = HI(mod_chunk->start);
data[5] = HI(center);
data[7] = HI(db);
data[4] = HI(duration);
data[5] = HI(direction);
data[7] = HI(interval);
data[9] = HI(mod_id1);
data[11] = HI(mod_id2);
data[13] = HI(delay);
data[1] = HI(mod_chunk->start);
data[1] = HI(mod_chunk->start);
data[4] = HI(phase);
data[6] = HI(period);
iforce->xmit.buf[head] = HI(cmd);
iforce_serio->expect_packet = HI(FF_CMD_QUERY);
((char *) ati_remote->out_urb->transfer_buffer)[0] = HI(cmd);
DBG_SHOW_FLAG_MASKED(DRIVE_STRENGTH, DRIVE_STRENGTH_BIT_MSK(HI),
tmp = DRIVE_STRENGTH_BIT_MSK(HI) - tmp;
setting = DRIVE_STRENGTH_BIT_MSK(HI) - setting;
typedef unsigned int UHWtype __attribute__((mode(HI)));
softirq_name(HI) \
prdbg(HI);
HI(s->buffer_addr));
HI(s->buffer_addr + s->dma_size));
HI(s->buffer_addr));