drivers/clk/meson/gxbb.c

199

.reg_off = HHI_HDMI_PLL_CNTL,

drivers/clk/meson/gxbb.c

204

.reg_off = HHI_HDMI_PLL_CNTL,

drivers/clk/meson/gxbb.c

209

.reg_off = HHI_HDMI_PLL_CNTL,

drivers/clk/meson/gxbb.c

219

.reg_off = HHI_HDMI_PLL_CNTL,

drivers/clk/meson/gxbb.c

224

.reg_off = HHI_HDMI_PLL_CNTL,

drivers/clk/meson/gxbb.c

247

.reg_off = HHI_HDMI_PLL_CNTL,

drivers/clk/meson/gxbb.c

252

.reg_off = HHI_HDMI_PLL_CNTL,

drivers/clk/meson/gxbb.c

257

.reg_off = HHI_HDMI_PLL_CNTL,

drivers/clk/meson/gxbb.c

273

.reg_off = HHI_HDMI_PLL_CNTL,

drivers/clk/meson/gxbb.c

278

.reg_off = HHI_HDMI_PLL_CNTL,

drivers/gpu/drm/meson/meson_vclk.c

246

regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL, 0x5800023d);

drivers/gpu/drm/meson/meson_vclk.c

252

regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL, 0x4800023d);

drivers/gpu/drm/meson/meson_vclk.c

255

regmap_read_poll_timeout(priv->hhi, HHI_HDMI_PLL_CNTL, val,

drivers/gpu/drm/meson/meson_vclk.c

259

regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL, 0x4000027b);

drivers/gpu/drm/meson/meson_vclk.c

267

regmap_update_bits(priv->hhi, HHI_HDMI_PLL_CNTL,

drivers/gpu/drm/meson/meson_vclk.c

269

regmap_update_bits(priv->hhi, HHI_HDMI_PLL_CNTL,

drivers/gpu/drm/meson/meson_vclk.c

273

regmap_read_poll_timeout(priv->hhi, HHI_HDMI_PLL_CNTL, val,

drivers/gpu/drm/meson/meson_vclk.c

276

regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL, 0x1a0504f7);

drivers/gpu/drm/meson/meson_vclk.c

283

regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL, 0x3a0504f7);

drivers/gpu/drm/meson/meson_vclk.c

284

regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL, 0x1a0504f7);

drivers/gpu/drm/meson/meson_vclk.c

287

regmap_read_poll_timeout(priv->hhi, HHI_HDMI_PLL_CNTL, val,

drivers/gpu/drm/meson/meson_vclk.c

497

regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL, 0x58000200 | m);

drivers/gpu/drm/meson/meson_vclk.c

510

regmap_update_bits(priv->hhi, HHI_HDMI_PLL_CNTL,

drivers/gpu/drm/meson/meson_vclk.c

514

regmap_read_poll_timeout(priv->hhi, HHI_HDMI_PLL_CNTL,

drivers/gpu/drm/meson/meson_vclk.c

518

regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL, 0x40000200 | m);

drivers/gpu/drm/meson/meson_vclk.c

526

regmap_update_bits(priv->hhi, HHI_HDMI_PLL_CNTL,

drivers/gpu/drm/meson/meson_vclk.c

528

regmap_update_bits(priv->hhi, HHI_HDMI_PLL_CNTL,

drivers/gpu/drm/meson/meson_vclk.c

532

regmap_read_poll_timeout(priv->hhi, HHI_HDMI_PLL_CNTL, val,

drivers/gpu/drm/meson/meson_vclk.c

535

regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL, 0x0b3a0400 | m);

drivers/gpu/drm/meson/meson_vclk.c

539

regmap_update_bits(priv->hhi, HHI_HDMI_PLL_CNTL,

drivers/gpu/drm/meson/meson_vclk.c

569

regmap_update_bits(priv->hhi, HHI_HDMI_PLL_CNTL,

drivers/gpu/drm/meson/meson_vclk.c

573

regmap_update_bits(priv->hhi, HHI_HDMI_PLL_CNTL,

drivers/gpu/drm/meson/meson_vclk.c

578

HHI_HDMI_PLL_CNTL, val,

drivers/gpu/drm/meson/meson_vclk.c

594

regmap_update_bits(priv->hhi, HHI_HDMI_PLL_CNTL,

drivers/gpu/drm/meson/meson_vclk.c

605

regmap_update_bits(priv->hhi, HHI_HDMI_PLL_CNTL,

drivers/gpu/drm/meson/meson_vclk.c

616

regmap_update_bits(priv->hhi, HHI_HDMI_PLL_CNTL,