HDMI_CORE_DDC_CMD
REG_FLD_MOD(base, HDMI_CORE_DDC_CMD, 0x4, 3, 0);
REG_FLD_MOD(base, HDMI_CORE_DDC_CMD, 0x2, 3, 0);
DUMPCORE(HDMI_CORE_DDC_CMD);
REG_FLD_MOD(base, HDMI_CORE_DDC_CMD, 0xf, 3, 0);
REG_FLD_MOD(base, HDMI_CORE_DDC_CMD, 0xA, 3, 0);
REG_FLD_MOD(base, HDMI_CORE_DDC_CMD, 0x9, 3, 0);
REG_FLD_MOD(base, HDMI_CORE_DDC_CMD, 0x4, 3, 0);
REG_FLD_MOD(base, HDMI_CORE_DDC_CMD, 0x2, 3, 0);
DUMPCORE(HDMI_CORE_DDC_CMD);
REG_FLD_MOD(base, HDMI_CORE_DDC_CMD, 0xf, 3, 0);
REG_FLD_MOD(base, HDMI_CORE_DDC_CMD, 0xA, 3, 0);
REG_FLD_MOD(base, HDMI_CORE_DDC_CMD, 0x9, 3, 0);