HEX_0
{"lds",{A_REG_N,A_MACH},{HEX_4,REG_N,HEX_0,HEX_A}},
{"lds.l",{A_INC_N,A_MACH},{HEX_4,REG_N,HEX_0,HEX_6}},
{"ldtlb",{0},{HEX_0,HEX_0,HEX_3,HEX_8}},
{"mov.b",{ A_REG_M,A_IND_R0_REG_N},{HEX_0,REG_N,REG_M,HEX_4}},
{"mov.b",{ A_REG_M,A_IND_N},{HEX_2,REG_N,REG_M,HEX_0}},
{"mov.b",{A_IND_R0_REG_M,A_REG_N},{HEX_0,REG_N,REG_M,HEX_C}},
{"mov.b",{A_IND_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_0}},
{"mov.b",{A_R0,A_DISP_REG_M},{HEX_8,HEX_0,REG_M,IMM_4}},
{"mov.b",{A_R0,A_DISP_GBR},{HEX_C,HEX_0,IMM_8}},
{"mov.l",{ A_REG_M,A_IND_R0_REG_N},{HEX_0,REG_N,REG_M,HEX_6}},
{"mov.l",{A_IND_R0_REG_M,A_REG_N},{HEX_0,REG_N,REG_M,HEX_E}},
{"mov.w",{ A_REG_M,A_IND_R0_REG_N},{HEX_0,REG_N,REG_M,HEX_5}},
{"mov.w",{A_IND_R0_REG_M,A_REG_N},{HEX_0,REG_N,REG_M,HEX_D}},
{"movca.l",{A_R0,A_IND_N},{HEX_0,REG_N,HEX_C,HEX_3}},
{"movt",{A_REG_N},{HEX_0,REG_N,HEX_2,HEX_9}},
{"mul.l",{ A_REG_M,A_REG_N},{HEX_0,REG_N,REG_M,HEX_7}},
{"nop",{0},{HEX_0,HEX_0,HEX_0,HEX_9}},
{"ocbi",{A_IND_N},{HEX_0,REG_N,HEX_9,HEX_3}},
{"ocbp",{A_IND_N},{HEX_0,REG_N,HEX_A,HEX_3}},
{"ocbwb",{A_IND_N},{HEX_0,REG_N,HEX_B,HEX_3}},
{"pref",{A_IND_N},{HEX_0,REG_N,HEX_8,HEX_3}},
{"rotl",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_4}},
{"rotr",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_5}},
{"rte",{0},{HEX_0,HEX_0,HEX_2,HEX_B}},
{"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}},
{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}},
{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}},
{"shal",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_0}},
{"shll",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_0}},
{"shll2",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_8}},
{"shlr",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_1}},
{"shlr2",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_9}},
{"sleep",{0},{HEX_0,HEX_0,HEX_1,HEX_B}},
{"stc",{A_SR,A_REG_N},{HEX_0,REG_N,HEX_0,HEX_2}},
{"stc",{A_GBR,A_REG_N},{HEX_0,REG_N,HEX_1,HEX_2}},
{"stc",{A_VBR,A_REG_N},{HEX_0,REG_N,HEX_2,HEX_2}},
{"stc",{A_SSR,A_REG_N},{HEX_0,REG_N,HEX_3,HEX_2}},
{"stc",{A_SPC,A_REG_N},{HEX_0,REG_N,HEX_4,HEX_2}},
{"stc",{A_SGR,A_REG_N},{HEX_0,REG_N,HEX_6,HEX_2}},
{"stc",{A_DBR,A_REG_N},{HEX_0,REG_N,HEX_7,HEX_2}},
{"stc",{A_REG_B,A_REG_N},{HEX_0,REG_N,REG_B,HEX_2}},
{"stc.l",{A_SR,A_DEC_N},{HEX_4,REG_N,HEX_0,HEX_3}},
{"sts",{A_MACH,A_REG_N},{HEX_0,REG_N,HEX_0,HEX_A}},
{"sts",{A_MACL,A_REG_N},{HEX_0,REG_N,HEX_1,HEX_A}},
{"sts",{A_PR,A_REG_N},{HEX_0,REG_N,HEX_2,HEX_A}},
{"sts",{FPUL_M,A_REG_N},{HEX_0,REG_N,HEX_5,HEX_A}},
{"sts",{FPSCR_M,A_REG_N},{HEX_0,REG_N,HEX_6,HEX_A}},
{"sts.l",{A_MACH,A_DEC_N},{HEX_4,REG_N,HEX_0,HEX_2}},
{"mul.l",{ A_REG_M,A_REG_N},{HEX_0,REG_N,REG_M,HEX_7}},
{"dt",{A_REG_N},{HEX_4,REG_N,HEX_1,HEX_0}},
{"mac.l",{A_INC_M,A_INC_N},{HEX_0,REG_N,REG_M,HEX_F}},
{"braf",{A_REG_N},{HEX_0,REG_N,HEX_2,HEX_3}},
{"bsrf",{A_REG_N},{HEX_0,REG_N,HEX_0,HEX_3}},
{"fadd",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_0}},
{"fadd",{D_REG_M,D_REG_N},{HEX_F,REG_N,REG_M,HEX_0}},
{"fsts",{FPUL_M,F_REG_N},{HEX_F,REG_N,HEX_0,HEX_D}},
{"clrmac",{0},{HEX_0,HEX_0,HEX_2,HEX_8}},
{"clrs",{0},{HEX_0,HEX_0,HEX_4,HEX_8}},
{"clrt",{0},{HEX_0,HEX_0,HEX_0,HEX_8}},
{"cmp/eq",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_0}},
{"div0u",{0},{HEX_0,HEX_0,HEX_1,HEX_9}},
{"jsr",{A_IND_N},{HEX_4,REG_N,HEX_0,HEX_B}},
{"ldc",{A_REG_N,A_SR},{HEX_4,REG_N,HEX_0,HEX_E}},
{"ldc.l",{A_INC_N,A_SR},{HEX_4,REG_N,HEX_0,HEX_7}},