drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

1486

tmp = REG_SET_FIELD(tmp, HDMI_ACR_32_0, HDMI_ACR_CTS_32, acr.cts_32khz);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

1494

tmp = REG_SET_FIELD(tmp, HDMI_ACR_32_0, HDMI_ACR_CTS_32, acr.cts_32khz);

drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c

1316

REG_UPDATE(HDMI_ACR_32_0, HDMI_ACR_CTS_32, audio_clock_info.cts_32khz);

drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h

184

SE_SF(HDMI_ACR_32_0, HDMI_ACR_CTS_32, mask_sh),\

drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h

262

SE_SF(DIG0_HDMI_ACR_32_0, HDMI_ACR_CTS_32, mask_sh),\

drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h

457

uint8_t HDMI_ACR_CTS_32;

drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h

590

uint32_t HDMI_ACR_CTS_32;

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.c

1287

REG_UPDATE(HDMI_ACR_32_0, HDMI_ACR_CTS_32, audio_clock_info.cts_32khz);

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.h

253

SE_SF(DIG0_HDMI_ACR_32_0, HDMI_ACR_CTS_32, mask_sh),\

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.h

469

type HDMI_ACR_CTS_32;\

drivers/gpu/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.c

795

REG_UPDATE(HDMI_ACR_32_0, HDMI_ACR_CTS_32, audio_clock_info.cts_32khz);

drivers/gpu/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.h

156

SE_SF(DIG0_HDMI_ACR_32_0, HDMI_ACR_CTS_32, mask_sh),\

drivers/gpu/drm/amd/display/dc/dio/dcn314/dcn314_dio_stream_encoder.h

156

SE_SF(DIG0_HDMI_ACR_32_0, HDMI_ACR_CTS_32, mask_sh),\

drivers/gpu/drm/amd/display/dc/dio/dcn32/dcn32_dio_stream_encoder.h

77

SE_SF(DIG0_HDMI_ACR_32_0, HDMI_ACR_CTS_32, mask_sh),\

drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_stream_encoder.h

157

SE_SF(DIG0_HDMI_ACR_32_0, HDMI_ACR_CTS_32, mask_sh),\

drivers/gpu/drm/amd/display/dc/dio/dcn401/dcn401_dio_stream_encoder.h

79

SE_SF(DIG0_HDMI_ACR_32_0, HDMI_ACR_CTS_32, mask_sh),\

drivers/gpu/drm/amd/display/dc/dio/dcn42/dcn42_dio_stream_encoder.c

366

REG_UPDATE(HDMI_ACR_32_0, HDMI_ACR_CTS_32, audio_clock_info.cts_32khz);

drivers/gpu/drm/amd/display/dc/dio/dcn42/dcn42_dio_stream_encoder.h

75

SE_SF(DIG0_HDMI_ACR_32_0, HDMI_ACR_CTS_32, mask_sh),\

drivers/gpu/drm/amd/display/dc/hpo/dcn30/dcn30_hpo_frl_stream_encoder.c

730

REG_UPDATE(HDMI_TB_ENC_ACR_32_0, HDMI_ACR_CTS_32, audio_clock_info.cts_32khz);

drivers/gpu/drm/amd/display/dc/hpo/dcn30/dcn30_hpo_frl_stream_encoder.h

215

SE_SF(HDMI_TB_ENC_ACR_32_0, HDMI_ACR_CTS_32, mask_sh),\

drivers/gpu/drm/amd/display/dc/hpo/dcn30/dcn30_hpo_frl_stream_encoder.h

310

type HDMI_ACR_CTS_32;\

drivers/gpu/drm/amd/display/dc/hpo/dcn401/dcn401_hpo_frl_stream_encoder.c

767

REG_UPDATE(HDMI_TB_ENC_ACR_32_0, HDMI_ACR_CTS_32, audio_clock_info.cts_32khz);

drivers/gpu/drm/amd/display/dc/hpo/dcn401/dcn401_hpo_frl_stream_encoder.h

127

SE_SF(HDMI_TB_ENC_ACR_32_0, HDMI_ACR_CTS_32, mask_sh),\

drivers/gpu/drm/amd/display/dc/hpo/dcn401/dcn401_hpo_frl_stream_encoder.h

214

type HDMI_ACR_CTS_32;\

drivers/gpu/drm/amd/display/dc/hpo/dcn42/dcn42_hpo_frl_stream_encoder.c

104

REG_UPDATE(HDMI_TB_ENC_ACR_32_0, HDMI_ACR_CTS_32, audio_clock_info.cts_32khz);

drivers/gpu/drm/radeon/evergreen_hdmi.c

89

WREG32(HDMI_ACR_32_0 + offset, HDMI_ACR_CTS_32(acr->cts_32khz));