HDMI_WP_PWR_CTRL
DUMPREG(HDMI_WP_PWR_CTRL);
if (REG_GET(wp->base, HDMI_WP_PWR_CTRL, 5, 4) == val)
REG_FLD_MOD(wp->base, HDMI_WP_PWR_CTRL, val, 7, 6);
if (hdmi_wait_for_bit_change(wp->base, HDMI_WP_PWR_CTRL, 5, 4, val)
REG_FLD_MOD(wp->base, HDMI_WP_PWR_CTRL, val, 3, 2);
if (hdmi_wait_for_bit_change(wp->base, HDMI_WP_PWR_CTRL, 1, 0, val)
DUMPREG(HDMI_WP_PWR_CTRL);
if (REG_GET(wp->base, HDMI_WP_PWR_CTRL, 5, 4) == val)
REG_FLD_MOD(wp->base, HDMI_WP_PWR_CTRL, val, 7, 6);
if (hdmi_wait_for_bit_change(wp->base, HDMI_WP_PWR_CTRL, 5, 4, val)
REG_FLD_MOD(wp->base, HDMI_WP_PWR_CTRL, val, 3, 2);
if (hdmi_wait_for_bit_change(wp->base, HDMI_WP_PWR_CTRL, 1, 0, val)