HDMI_NUM_TX_CHANNEL
for (i = 0; i < HDMI_NUM_TX_CHANNEL; i++)
for (i = 0; i < HDMI_NUM_TX_CHANNEL; i++) {
for (i = 0; i < HDMI_NUM_TX_CHANNEL; i++) {
void __iomem *mmio_qserdes_tx[HDMI_NUM_TX_CHANNEL];
for (i = 0; i < HDMI_NUM_TX_CHANNEL; i++) {
u32 tx_lx_lane_mode[HDMI_NUM_TX_CHANNEL];
for (i = 0; i < HDMI_NUM_TX_CHANNEL; i++) {
u32 tx_lx_tx_band[HDMI_NUM_TX_CHANNEL];
for (i = 0; i < HDMI_NUM_TX_CHANNEL; i++) {
for (i = 0; i < HDMI_NUM_TX_CHANNEL; i++)
u32 tx_lx_tx_drv_lvl[HDMI_NUM_TX_CHANNEL];
u32 tx_lx_tx_emp_post1_lvl[HDMI_NUM_TX_CHANNEL];
u32 tx_lx_vmode_ctrl1[HDMI_NUM_TX_CHANNEL];
u32 tx_lx_vmode_ctrl2[HDMI_NUM_TX_CHANNEL];
u32 tx_lx_res_code_lane_tx[HDMI_NUM_TX_CHANNEL];
u32 tx_lx_hp_pd_enables[HDMI_NUM_TX_CHANNEL];
for (i = 0; i < HDMI_NUM_TX_CHANNEL; i++) {
for (i = 0; i < HDMI_NUM_TX_CHANNEL; i++)
void __iomem *mmio_qserdes_tx[HDMI_NUM_TX_CHANNEL];
for (i = 0; i < HDMI_NUM_TX_CHANNEL; i++) {
for (i = 0; i < HDMI_NUM_TX_CHANNEL; i++) {
for (i = 0; i < HDMI_NUM_TX_CHANNEL; i++) {
u32 tx_lx_tx_band[HDMI_NUM_TX_CHANNEL];
for (i = 0; i < HDMI_NUM_TX_CHANNEL; i++) {
u32 tx_lx_tx_drv_lvl[HDMI_NUM_TX_CHANNEL];
u32 tx_lx_tx_emp_post1_lvl[HDMI_NUM_TX_CHANNEL];
u32 tx_lx_pre_driver_1[HDMI_NUM_TX_CHANNEL];
u32 tx_lx_pre_driver_2[HDMI_NUM_TX_CHANNEL];
u32 tx_lx_res_code_offset[HDMI_NUM_TX_CHANNEL];
for (i = 0; i < HDMI_NUM_TX_CHANNEL; i++) {