arch/arm64/include/asm/kvm_host.h

1692

case HDFGWTR_EL2:

arch/arm64/include/asm/kvm_host.h

1720

case HDFGWTR_EL2: \

arch/arm64/kvm/config.c

1550

case HDFGWTR_EL2:

arch/arm64/kvm/config.c

1626

case HDFGWTR_EL2:

arch/arm64/kvm/config.c

1681

__compute_fgt(vcpu, HDFGWTR_EL2);

arch/arm64/kvm/config.c

1684

*vcpu_fgt(vcpu, HDFGWTR_EL2) |= HDFGWTR_EL2_MDSCR_EL1;

arch/arm64/kvm/emulate-nested.c

2600

fgtreg = is_read ? HDFGRTR_EL2 : HDFGWTR_EL2;

arch/arm64/kvm/hyp/include/hyp/switch.h

221

__activate_fgt(hctxt, vcpu, HDFGWTR_EL2);

arch/arm64/kvm/hyp/include/hyp/switch.h

265

__deactivate_fgt(hctxt, vcpu, HDFGWTR_EL2);

arch/arm64/kvm/nested.c

1759

resx = get_reg_fixed_bits(kvm, HDFGWTR_EL2);

arch/arm64/kvm/nested.c

1760

set_sysreg_masks(kvm, HDFGWTR_EL2, resx);

arch/arm64/kvm/sys_regs.c

3781

EL2_REG_VNCR_FILT(HDFGWTR_EL2, fgt_visibility),

tools/testing/selftests/kvm/arm64/get-reg-list.c

57

REG_FEAT(HDFGWTR_EL2, ID_AA64MMFR0_EL1, FGT, IMP),

tools/testing/selftests/kvm/arm64/get-reg-list.c

746

SYS_REG(HDFGWTR_EL2),