HDFGWTR2_EL2
case HDFGWTR2_EL2:
case HDFGWTR2_EL2: \
case HDFGWTR2_EL2:
case HDFGWTR2_EL2:
__compute_fgt(vcpu, HDFGWTR2_EL2);
fgtreg = is_read ? HDFGRTR2_EL2 : HDFGWTR2_EL2;
__activate_fgt(hctxt, vcpu, HDFGWTR2_EL2);
__deactivate_fgt(hctxt, vcpu, HDFGWTR2_EL2);
resx = get_reg_fixed_bits(kvm, HDFGWTR2_EL2);
set_sysreg_masks(kvm, HDFGWTR2_EL2, resx);
EL2_REG_VNCR_FILT(HDFGWTR2_EL2, fgt2_visibility),
REG_FEAT(HDFGWTR2_EL2, ID_AA64MMFR0_EL1, FGT, FGT2),
SYS_REG(HDFGWTR2_EL2),