HDMI_CORE_I2CM_INT
REG_FLD_MOD(base, HDMI_CORE_I2CM_INT, 0x0, 2, 2);
REG_FLD_MOD(base, HDMI_CORE_I2CM_INT, 0x1, 2, 2);
DUMPCORE(HDMI_CORE_I2CM_INT);
REG_FLD_MOD(base, HDMI_CORE_I2CM_INT, 0x1, 2, 2);
REG_FLD_MOD(base, HDMI_CORE_I2CM_INT, 0x1, 3, 3);
REG_FLD_MOD(base, HDMI_CORE_I2CM_INT, 0x1, 3, 3);
REG_FLD_MOD(base, HDMI_CORE_I2CM_INT, 0x0, 2, 2);
REG_FLD_MOD(base, HDMI_CORE_I2CM_INT, 0x1, 2, 2);
DUMPCORE(HDMI_CORE_I2CM_INT);
REG_FLD_MOD(base, HDMI_CORE_I2CM_INT, 0x1, 2, 2);