HDMI_CORE_AUD_GP_CONF1
REG_FLD_MOD(base, HDMI_CORE_AUD_GP_CONF1, 3, 7, 0);
REG_FLD_MOD(base, HDMI_CORE_AUD_GP_CONF1, 0x3F, 7, 0);
REG_FLD_MOD(base, HDMI_CORE_AUD_GP_CONF1, 0xFF, 7, 0);
REG_FLD_MOD(base, HDMI_CORE_AUD_GP_CONF1, 3, 7, 0);
REG_FLD_MOD(base, HDMI_CORE_AUD_GP_CONF1, 0x3F, 7, 0);
REG_FLD_MOD(base, HDMI_CORE_AUD_GP_CONF1, 0xFF, 7, 0);