drivers/phy/mediatek/phy-mtk-hdmi-mt2701.c

115

mtk_phy_set_bits(base + HDMI_CON2, RG_HDMITX_EN_TX_POSDIV);

drivers/phy/mediatek/phy-mtk-hdmi-mt2701.c

118

mtk_phy_update_field(base + HDMI_CON2, RG_HDMITX_TX_POSDIV_MASK, pos_div);

drivers/phy/mediatek/phy-mtk-hdmi-mt2701.c

159

tmp = readl(hdmi_phy->regs + HDMI_CON2);

drivers/phy/mediatek/phy-mtk-hdmi-mt2701.c

184

mtk_phy_set_bits(base + HDMI_CON2, RG_HDMITX_EN_MBIAS);

drivers/phy/mediatek/phy-mtk-hdmi-mt2701.c

187

mtk_phy_set_bits(base + HDMI_CON2, RG_HDMITX_EN_TX_CKLDO);

drivers/phy/mediatek/phy-mtk-hdmi-mt2701.c

190

mtk_phy_set_bits(base + HDMI_CON2, RG_HDMITX_MBIAS_LPF_EN);

drivers/phy/mediatek/phy-mtk-hdmi-mt2701.c

204

mtk_phy_clear_bits(base + HDMI_CON2, RG_HDMITX_MBIAS_LPF_EN);

drivers/phy/mediatek/phy-mtk-hdmi-mt2701.c

207

mtk_phy_clear_bits(base + HDMI_CON2, RG_HDMITX_EN_TX_CKLDO);

drivers/phy/mediatek/phy-mtk-hdmi-mt2701.c

210

mtk_phy_clear_bits(base + HDMI_CON2, RG_HDMITX_EN_MBIAS);

drivers/phy/mediatek/phy-mtk-hdmi-mt2701.c

58

mtk_phy_set_bits(base + HDMI_CON2, RG_HDMITX_EN_MBIAS);

drivers/phy/mediatek/phy-mtk-hdmi-mt2701.c

61

mtk_phy_set_bits(base + HDMI_CON2, RG_HDMITX_EN_TX_CKLDO);

drivers/phy/mediatek/phy-mtk-hdmi-mt2701.c

64

mtk_phy_set_bits(base + HDMI_CON2, RG_HDMITX_MBIAS_LPF_EN);

drivers/phy/mediatek/phy-mtk-hdmi-mt2701.c

80

mtk_phy_clear_bits(base + HDMI_CON2, RG_HDMITX_MBIAS_LPF_EN);

drivers/phy/mediatek/phy-mtk-hdmi-mt2701.c

83

mtk_phy_clear_bits(base + HDMI_CON2, RG_HDMITX_EN_TX_CKLDO);

drivers/phy/mediatek/phy-mtk-hdmi-mt2701.c

86

mtk_phy_clear_bits(base + HDMI_CON2, RG_HDMITX_EN_MBIAS);