drivers/phy/mediatek/phy-mtk-hdmi-mt2701.c

128

mtk_phy_clear_bits(base + HDMI_CON0, RG_HDMITX_EN_IMP_MASK);

drivers/phy/mediatek/phy-mtk-hdmi-mt2701.c

131

mtk_phy_update_field(base + HDMI_CON0, RG_HDMITX_DRV_IBIAS_MASK, 0xa);

drivers/phy/mediatek/phy-mtk-hdmi-mt2701.c

188

mtk_phy_set_bits(base + HDMI_CON0, RG_HDMITX_EN_SLDO_MASK);

drivers/phy/mediatek/phy-mtk-hdmi-mt2701.c

191

mtk_phy_set_bits(base + HDMI_CON0, RG_HDMITX_EN_SER_MASK);

drivers/phy/mediatek/phy-mtk-hdmi-mt2701.c

192

mtk_phy_set_bits(base + HDMI_CON0, RG_HDMITX_EN_PRED_MASK);

drivers/phy/mediatek/phy-mtk-hdmi-mt2701.c

193

mtk_phy_set_bits(base + HDMI_CON0, RG_HDMITX_EN_DRV_MASK);

drivers/phy/mediatek/phy-mtk-hdmi-mt2701.c

201

mtk_phy_clear_bits(base + HDMI_CON0, RG_HDMITX_EN_DRV_MASK);

drivers/phy/mediatek/phy-mtk-hdmi-mt2701.c

202

mtk_phy_clear_bits(base + HDMI_CON0, RG_HDMITX_EN_PRED_MASK);

drivers/phy/mediatek/phy-mtk-hdmi-mt2701.c

203

mtk_phy_clear_bits(base + HDMI_CON0, RG_HDMITX_EN_SER_MASK);

drivers/phy/mediatek/phy-mtk-hdmi-mt2701.c

206

mtk_phy_clear_bits(base + HDMI_CON0, RG_HDMITX_EN_SLDO_MASK);

drivers/phy/mediatek/phy-mtk-hdmi-mt2701.c

62

mtk_phy_set_bits(base + HDMI_CON0, RG_HDMITX_EN_SLDO_MASK);

drivers/phy/mediatek/phy-mtk-hdmi-mt2701.c

65

mtk_phy_set_bits(base + HDMI_CON0, RG_HDMITX_EN_SER_MASK);

drivers/phy/mediatek/phy-mtk-hdmi-mt2701.c

66

mtk_phy_set_bits(base + HDMI_CON0, RG_HDMITX_EN_PRED_MASK);

drivers/phy/mediatek/phy-mtk-hdmi-mt2701.c

67

mtk_phy_set_bits(base + HDMI_CON0, RG_HDMITX_EN_DRV_MASK);

drivers/phy/mediatek/phy-mtk-hdmi-mt2701.c

77

mtk_phy_clear_bits(base + HDMI_CON0, RG_HDMITX_EN_DRV_MASK);

drivers/phy/mediatek/phy-mtk-hdmi-mt2701.c

78

mtk_phy_clear_bits(base + HDMI_CON0, RG_HDMITX_EN_PRED_MASK);

drivers/phy/mediatek/phy-mtk-hdmi-mt2701.c

79

mtk_phy_clear_bits(base + HDMI_CON0, RG_HDMITX_EN_SER_MASK);

drivers/phy/mediatek/phy-mtk-hdmi-mt2701.c

82

mtk_phy_clear_bits(base + HDMI_CON0, RG_HDMITX_EN_SLDO_MASK);

drivers/phy/mediatek/phy-mtk-hdmi-mt8173.c

113

mtk_phy_clear_bits(base + HDMI_CON0, RG_HDMITX_PLL_EN);

drivers/phy/mediatek/phy-mtk-hdmi-mt8173.c

116

mtk_phy_clear_bits(base + HDMI_CON0, RG_HDMITX_PLL_POSDIV);

drivers/phy/mediatek/phy-mtk-hdmi-mt8173.c

160

mtk_phy_update_field(base + HDMI_CON0, RG_HDMITX_PLL_PREDIV, pre_div);

drivers/phy/mediatek/phy-mtk-hdmi-mt8173.c

161

mtk_phy_set_bits(base + HDMI_CON0, RG_HDMITX_PLL_POSDIV);

drivers/phy/mediatek/phy-mtk-hdmi-mt8173.c

162

mtk_phy_update_bits(base + HDMI_CON0,

drivers/phy/mediatek/phy-mtk-hdmi-mt8173.c

167

mtk_phy_update_bits(base + HDMI_CON0,

drivers/phy/mediatek/phy-mtk-hdmi-mt8173.c

172

mtk_phy_update_bits(base + HDMI_CON0,

drivers/phy/mediatek/phy-mtk-hdmi-mt8173.c

93

mtk_phy_set_bits(base + HDMI_CON0, RG_HDMITX_PLL_POSDIV);

drivers/phy/mediatek/phy-mtk-hdmi-mt8173.c

97

mtk_phy_set_bits(base + HDMI_CON0, RG_HDMITX_PLL_EN);