drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c

135

mtk_phy_update_field(regs + HDMI_1_PLL_CFG_4, RG_HDMITXPLL_POSDIV_DIV3_CTRL, div3_ctrl_value);

drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c

136

mtk_phy_update_field(regs + HDMI_1_PLL_CFG_4, RG_HDMITXPLL_POSDIV, posdiv_vallue);

drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c

156

mtk_phy_update_field(regs + HDMI_1_PLL_CFG_4, RG_HDMITXPLL_DIV_CTRL, div_ctrl_value);

drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c

187

mtk_phy_update_field(regs + HDMI_1_PLL_CFG_4, RG_HDMITXPLL_PREDIV, prediv_value);

drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c

195

mtk_phy_update_field(regs + HDMI_1_PLL_CFG_4, RG_HDMITXPLL_FBKDIV_HIGH, fbkdiv_high);

drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c

384

mtk_phy_set_bits(regs + HDMI_1_PLL_CFG_4, DA_HDMITXPLL_PWR_ON);

drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c

386

mtk_phy_clear_bits(regs + HDMI_1_PLL_CFG_4, DA_HDMITXPLL_ISO_EN);

drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c

405

mtk_phy_set_bits(regs + HDMI_1_PLL_CFG_4, DA_HDMITXPLL_ISO_EN);

drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c

407

mtk_phy_clear_bits(regs + HDMI_1_PLL_CFG_4, DA_HDMITXPLL_PWR_ON);