HDCP_REP_CTL
intel_de_rmw(display, HDCP_REP_CTL, repeater_ctl, 0);
if (intel_de_wait_for_set_ms(display, HDCP_REP_CTL, HDCP_SHA1_READY, 1)) {
intel_de_write(display, HDCP_REP_CTL, rep_ctl | HDCP_SHA1_TEXT_32);
intel_de_write(display, HDCP_REP_CTL,
intel_de_write(display, HDCP_REP_CTL,
intel_de_write(display, HDCP_REP_CTL,
intel_de_write(display, HDCP_REP_CTL,
intel_de_write(display, HDCP_REP_CTL,
intel_de_write(display, HDCP_REP_CTL,
intel_de_write(display, HDCP_REP_CTL,
intel_de_write(display, HDCP_REP_CTL,
intel_de_write(display, HDCP_REP_CTL,
intel_de_write(display, HDCP_REP_CTL,
intel_de_write(display, HDCP_REP_CTL,
intel_de_write(display, HDCP_REP_CTL,
intel_de_write(display, HDCP_REP_CTL,
intel_de_write(display, HDCP_REP_CTL,
intel_de_write(display, HDCP_REP_CTL, rep_ctl | HDCP_SHA1_TEXT_32);
intel_de_write(display, HDCP_REP_CTL,
if (intel_de_wait_for_set_ms(display, HDCP_REP_CTL,
if (!(intel_de_read(display, HDCP_REP_CTL) & HDCP_SHA1_V_MATCH)) {
intel_de_write(display, HDCP_REP_CTL,