HC_R0INT_ENA
creg_val &= ~(HC_R0INT_ENA << LPFC_FCP_RING);
creg_val |= (HC_R0INT_ENA << LPFC_FCP_RING);
creg_val |= (HC_R0INT_ENA << LPFC_FCP_RING);
creg_val |= (HC_R0INT_ENA << LPFC_FCP_RING);
creg_val |= (HC_R0INT_ENA << LPFC_FCP_RING);
if (!(control & (HC_R0INT_ENA << LPFC_ELS_RING))) {
control |= (HC_R0INT_ENA << LPFC_ELS_RING);
status |= HC_R0INT_ENA;
status &= ~(HC_R0INT_ENA);
creg_val |= (HC_R0INT_ENA << LPFC_FCP_RING);
creg_val &= ~(HC_R0INT_ENA << LPFC_FCP_RING);
if (control & (HC_R0INT_ENA << LPFC_ELS_RING)) {
~(HC_R0INT_ENA << LPFC_ELS_RING);
writel(hc_copy & ~(HC_MBINT_ENA | HC_R0INT_ENA | HC_R1INT_ENA