HCLK_RGA
GATE(HCLK_RGA, "hclk_rga", "hclk_vo_pre", 0, PX30_CLKGATE_CON(3), 8, GFLAGS),
GATE(HCLK_RGA, "hclk_rga", "hclk_vio", 0, RK2928_CLKGATE_CON(6), 10, GFLAGS),
GATE(HCLK_RGA, "hclk_rga", "hclk_cpu", 0, RK2928_CLKGATE_CON(6), 10, GFLAGS),
GATE(HCLK_RGA, "hclk_rga", "hclk_vio_pre", 0, RK2928_CLKGATE_CON(13), 1, GFLAGS),
GATE(HCLK_RGA, "hclk_rga", "hclk_vio", 0, RK3288_CLKGATE_CON(15), 1, GFLAGS),
GATE(HCLK_RGA, "hclk_rga", "hclk_vio_pre", 0, RK3328_CLKGATE_CON(21), 11, GFLAGS),
GATE(HCLK_RGA, "hclk_rga", "hclk_vio", 0, RK3368_CLKGATE_CON(16), 1, GFLAGS),
GATE(HCLK_RGA, "hclk_rga", "hclk_rga_pre", 0,
GATE(HCLK_RGA, "hclk_rga", "hclk_vio_root", 0,
GATE(HCLK_RGA, "hclk_rga", "hclk_rga_pre", 0,
GATE(HCLK_RGA, "hclk_rga", "hclk_rga_pre", 0,
GATE(HCLK_RGA, "hclk_rga", "hclk_vio_pre", 0,
GATE(HCLK_RGA, "hclk_rga", "hclk_pdvo", 0,
GATE(HCLK_RGA, "hclk_rga", "hclk_bus_root", 0,