HCLK_CAN0
D_MODULE(HCLK_CAN0, "hclk_can0", CLK_48, RB(0xf0, 3),
GATE(HCLK_CAN0, "hclk_can0", "hclk_lsperi_root", 0,
GATE(HCLK_CAN0, "hclk_can0", "hclk_bus_root", 0,
GATE(HCLK_CAN0, "hclk_can0", "hclk_vi_root", 0,