arch/arm/mach-clps711x/board-dt.c

42

DEFINE_RES_MEM(CLPS711X_PHYS_BASE + HALT, SZ_128);

drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c

386

f32_cntl = REG_SET_FIELD(f32_cntl, SDMA0_F32_CNTL, HALT, 0);

drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c

388

f32_cntl = REG_SET_FIELD(f32_cntl, SDMA0_F32_CNTL, HALT, 1);

drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c

952

tmp = REG_SET_FIELD(tmp, SDMA0_F32_CNTL, HALT, 0);

drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c

959

tmp = REG_SET_FIELD(tmp, SDMA0_F32_CNTL, HALT, 0);

drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c

623

f32_cntl = REG_SET_FIELD(f32_cntl, SDMA0_F32_CNTL, HALT, 0);

drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c

625

f32_cntl = REG_SET_FIELD(f32_cntl, SDMA0_F32_CNTL, HALT, 1);

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

1058

f32_cntl = REG_SET_FIELD(f32_cntl, SDMA0_F32_CNTL, HALT, enable ? 0 : 1);

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

1421

temp = REG_SET_FIELD(temp, SDMA0_F32_CNTL, HALT, 0);

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

1015

temp = REG_SET_FIELD(temp, SDMA_F32_CNTL, HALT, 0);

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

1721

if (!REG_GET_FIELD(RREG32_SDMA(ring->me, regSDMA_F32_CNTL), SDMA_F32_CNTL, HALT))

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

653

f32_cntl = REG_SET_FIELD(f32_cntl, SDMA_F32_CNTL, HALT, enable ? 0 : 1);

drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c

1596

f32_cntl = REG_SET_FIELD(f32_cntl, SDMA0_F32_CNTL, HALT, 1);

drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c

673

f32_cntl = REG_SET_FIELD(f32_cntl, SDMA0_F32_CNTL, HALT, enable ? 0 : 1);

drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c

817

temp = REG_SET_FIELD(temp, SDMA0_F32_CNTL, HALT, 0);

drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c

1505

f32_cntl = REG_SET_FIELD(f32_cntl, SDMA0_F32_CNTL, HALT, 1);

drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c

520

f32_cntl = REG_SET_FIELD(f32_cntl, SDMA0_F32_CNTL, HALT, enable ? 0 : 1);

drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c

664

temp = REG_SET_FIELD(temp, SDMA0_F32_CNTL, HALT, 0);

drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c

468

f32_cntl = REG_SET_FIELD(f32_cntl, SDMA0_F32_CNTL, HALT, enable ? 0 : 1);

drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c

601

temp = REG_SET_FIELD(temp, SDMA0_F32_CNTL, HALT, 0);

drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c

460

mcu_cntl = REG_SET_FIELD(mcu_cntl, SDMA0_MCU_CNTL, HALT, enable ? 0 : 1);

drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c

595

temp = REG_SET_FIELD(temp, SDMA0_MCU_CNTL, HALT, 0);

drivers/gpu/drm/amd/amdgpu/sdma_v7_1.c

442

mcu_cntl = REG_SET_FIELD(mcu_cntl, SDMA0_SDMA_MCU_CNTL, HALT, enable ? 0 : 1);

drivers/gpu/drm/amd/amdgpu/sdma_v7_1.c

577

temp = REG_SET_FIELD(temp, SDMA0_SDMA_MCU_CNTL, HALT, 0);

drivers/gpu/drm/amd/amdgpu/vpe_v6_1.c

163

f32_cntl = REG_SET_FIELD(f32_cntl, VPEC_F32_CNTL, HALT, 0);

drivers/gpu/drm/amd/amdgpu/vpe_v6_1.c

80

f32_cntl = REG_SET_FIELD(f32_cntl, VPEC_F32_CNTL, HALT, halt ? 1 : 0);