GU_CNTL
!(__raw_uncore_read32(uncore, GU_CNTL) & LMEM_INIT)) {
ret = intel_wait_for_register_fw(uncore, GU_CNTL, DRIVERFLR, 0, flr_timeout_ms, NULL);
intel_uncore_rmw_fw(uncore, GU_CNTL, 0, DRIVERFLR);
ret = intel_wait_for_register_fw(uncore, GU_CNTL,
ret = xe_mmio_wait32(mmio, GU_CNTL, DRIVERFLR, 0, flr_timeout, NULL, false);
xe_mmio_rmw32(mmio, GU_CNTL, 0, DRIVERFLR);
ret = xe_mmio_wait32(mmio, GU_CNTL, DRIVERFLR, 0, flr_timeout, NULL, false);
xe_assert(xe, xe_mmio_read32(xe_root_tile_mmio(xe), GU_CNTL) &