drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h

207

#define PREALLOC_NODES_MAX_COUNT (3 * GUC_MAX_ENGINE_CLASSES * GUC_MAX_INSTANCES_PER_CLASS)

drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c

237

for (j = 0; j < GUC_MAX_INSTANCES_PER_CLASS; ++j)

drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c

239

GUC_MAX_INSTANCES_PER_CLASS);

drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c

483

GEM_BUG_ON(engine->instance >= GUC_MAX_INSTANCES_PER_CLASS);

drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h

392

u8 mapping_table[GUC_MAX_ENGINE_CLASSES][GUC_MAX_INSTANCES_PER_CLASS];

drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h

422

struct guc_mmio_reg_set reg_state_list[GUC_MAX_ENGINE_CLASSES][GUC_MAX_INSTANCES_PER_CLASS];

drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h

451

struct guc_engine_usage_record engines[GUC_MAX_ENGINE_CLASSES][GUC_MAX_INSTANCES_PER_CLASS];

drivers/gpu/drm/xe/xe_guc_ads.c

536

for (j = 0; j < GUC_MAX_INSTANCES_PER_CLASS; ++j)

drivers/gpu/drm/xe/xe_guc_ads.c

538

GUC_MAX_INSTANCES_PER_CLASS);

drivers/gpu/drm/xe/xe_guc_capture.c

303

#define PREALLOC_NODES_MAX_COUNT (3 * GUC_MAX_ENGINE_CLASSES * GUC_MAX_INSTANCES_PER_CLASS)

drivers/gpu/drm/xe/xe_guc_engine_activity.c

311

for (j = 0; j < GUC_MAX_INSTANCES_PER_CLASS; j++)

drivers/gpu/drm/xe/xe_guc_engine_activity_types.h

56

struct engine_activity engine[GUC_MAX_ENGINE_CLASSES][GUC_MAX_INSTANCES_PER_CLASS];

drivers/gpu/drm/xe/xe_guc_fwif.h

124

u8 mapping_table[GUC_MAX_ENGINE_CLASSES][GUC_MAX_INSTANCES_PER_CLASS];

drivers/gpu/drm/xe/xe_guc_fwif.h

131

struct guc_mmio_reg_set reg_state_list[GUC_MAX_ENGINE_CLASSES][GUC_MAX_INSTANCES_PER_CLASS];

drivers/gpu/drm/xe/xe_guc_fwif.h

160

struct guc_engine_usage_record engines[GUC_MAX_ENGINE_CLASSES][GUC_MAX_INSTANCES_PER_CLASS];

drivers/gpu/drm/xe/xe_guc_fwif.h

172

struct guc_engine_activity engine_activity[GUC_MAX_ENGINE_CLASSES][GUC_MAX_INSTANCES_PER_CLASS];