Symbol: GT641XX_IRQ_BASE
arch/mips/include/asm/irq_gt641xx.h
10
#ifndef GT641XX_IRQ_BASE
arch/mips/include/asm/irq_gt641xx.h
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#define GT641XX_MEMORY_OUT_OF_RANGE_IRQ (GT641XX_IRQ_BASE + 1)
arch/mips/include/asm/irq_gt641xx.h
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#define GT641XX_DMA_OUT_OF_RANGE_IRQ (GT641XX_IRQ_BASE + 2)
arch/mips/include/asm/irq_gt641xx.h
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#define GT641XX_CPU_ACCESS_OUT_OF_RANGE_IRQ (GT641XX_IRQ_BASE + 3)
arch/mips/include/asm/irq_gt641xx.h
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#define GT641XX_DMA0_IRQ (GT641XX_IRQ_BASE + 4)
arch/mips/include/asm/irq_gt641xx.h
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#define GT641XX_DMA1_IRQ (GT641XX_IRQ_BASE + 5)
arch/mips/include/asm/irq_gt641xx.h
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#define GT641XX_DMA2_IRQ (GT641XX_IRQ_BASE + 6)
arch/mips/include/asm/irq_gt641xx.h
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#define GT641XX_DMA3_IRQ (GT641XX_IRQ_BASE + 7)
arch/mips/include/asm/irq_gt641xx.h
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#define GT641XX_TIMER0_IRQ (GT641XX_IRQ_BASE + 8)
arch/mips/include/asm/irq_gt641xx.h
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#define GT641XX_TIMER1_IRQ (GT641XX_IRQ_BASE + 9)
arch/mips/include/asm/irq_gt641xx.h
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#define GT641XX_TIMER2_IRQ (GT641XX_IRQ_BASE + 10)
arch/mips/include/asm/irq_gt641xx.h
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#define GT641XX_TIMER3_IRQ (GT641XX_IRQ_BASE + 11)
arch/mips/include/asm/irq_gt641xx.h
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#define GT641XX_PCI_0_MASTER_READ_ERROR_IRQ (GT641XX_IRQ_BASE + 12)
arch/mips/include/asm/irq_gt641xx.h
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#define GT641XX_PCI_0_SLAVE_WRITE_ERROR_IRQ (GT641XX_IRQ_BASE + 13)
arch/mips/include/asm/irq_gt641xx.h
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#define GT641XX_PCI_0_MASTER_WRITE_ERROR_IRQ (GT641XX_IRQ_BASE + 14)
arch/mips/include/asm/irq_gt641xx.h
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#define GT641XX_PCI_0_SLAVE_READ_ERROR_IRQ (GT641XX_IRQ_BASE + 15)
arch/mips/include/asm/irq_gt641xx.h
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#define GT641XX_PCI_0_ADDRESS_ERROR_IRQ (GT641XX_IRQ_BASE + 16)
arch/mips/include/asm/irq_gt641xx.h
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#define GT641XX_MEMORY_ERROR_IRQ (GT641XX_IRQ_BASE + 17)
arch/mips/include/asm/irq_gt641xx.h
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#define GT641XX_PCI_0_MASTER_ABORT_IRQ (GT641XX_IRQ_BASE + 18)
arch/mips/include/asm/irq_gt641xx.h
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#define GT641XX_PCI_0_TARGET_ABORT_IRQ (GT641XX_IRQ_BASE + 19)
arch/mips/include/asm/irq_gt641xx.h
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#define GT641XX_PCI_0_RETRY_TIMEOUT_IRQ (GT641XX_IRQ_BASE + 20)
arch/mips/include/asm/irq_gt641xx.h
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#define GT641XX_CPU_INT0_IRQ (GT641XX_IRQ_BASE + 21)
arch/mips/include/asm/irq_gt641xx.h
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#define GT641XX_CPU_INT1_IRQ (GT641XX_IRQ_BASE + 22)
arch/mips/include/asm/irq_gt641xx.h
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#define GT641XX_CPU_INT2_IRQ (GT641XX_IRQ_BASE + 23)
arch/mips/include/asm/irq_gt641xx.h
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#define GT641XX_CPU_INT3_IRQ (GT641XX_IRQ_BASE + 24)
arch/mips/include/asm/irq_gt641xx.h
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#define GT641XX_CPU_INT4_IRQ (GT641XX_IRQ_BASE + 25)
arch/mips/include/asm/irq_gt641xx.h
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#define GT641XX_PCI_INT0_IRQ (GT641XX_IRQ_BASE + 26)
arch/mips/include/asm/irq_gt641xx.h
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#define GT641XX_PCI_INT1_IRQ (GT641XX_IRQ_BASE + 27)
arch/mips/include/asm/irq_gt641xx.h
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#define GT641XX_PCI_INT2_IRQ (GT641XX_IRQ_BASE + 28)
arch/mips/include/asm/irq_gt641xx.h
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#define GT641XX_PCI_INT3_IRQ (GT641XX_IRQ_BASE + 29)
arch/mips/kernel/irq-gt641xx.c
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irq_set_chip_and_handler(GT641XX_IRQ_BASE + i,
arch/mips/kernel/irq-gt641xx.c
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#define GT641XX_IRQ_TO_BIT(irq) (1U << (irq - GT641XX_IRQ_BASE))
arch/mips/kernel/irq-gt641xx.c
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do_IRQ(GT641XX_IRQ_BASE + i);