arch/mips/kernel/pm-cps.c

383

uasm_i_jalr(&p, GPR_V0, GPR_T0);

arch/mips/kernel/pm-cps.c

582

uasm_i_andi(&p, GPR_V0, GPR_T1, (1 << fls(smp_num_siblings)) - 1);

arch/mips/kvm/entry.c

174

uasm_i_mfc0(&p, GPR_V0, C0_STATUS);

arch/mips/kvm/entry.c

175

UASM_i_SW(&p, GPR_V0, offsetof(struct pt_regs, cp0_status), GPR_K1);

arch/mips/kvm/entry.c

213

uasm_i_andi(&p, GPR_V0, GPR_V0, ST0_IM);

arch/mips/kvm/entry.c

214

uasm_i_or(&p, GPR_K0, GPR_K0, GPR_V0);

arch/mips/kvm/entry.c

589

uasm_i_mfc0(&p, GPR_V0, C0_STATUS);

arch/mips/kvm/entry.c

592

uasm_i_or(&p, GPR_K0, GPR_V0, GPR_AT);

arch/mips/kvm/entry.c

607

uasm_i_and(&p, GPR_V1, GPR_V0, GPR_AT);

arch/mips/kvm/entry.c

679

uasm_i_and(&p, GPR_V0, GPR_V0, GPR_AT);

arch/mips/kvm/entry.c

681

uasm_i_or(&p, GPR_V0, GPR_V0, GPR_AT);

arch/mips/kvm/entry.c

683

uasm_i_ori(&p, GPR_V0, GPR_V0, ST0_SX | ST0_UX);

arch/mips/kvm/entry.c

685

uasm_i_mtc0(&p, GPR_V0, C0_STATUS);

arch/mips/kvm/entry.c

765

uasm_i_andi(&p, GPR_T0, GPR_V0, RESUME_HOST);

arch/mips/kvm/entry.c

841

uasm_i_sra(&p, GPR_K0, GPR_V0, 2);

arch/mips/kvm/entry.c

842

uasm_i_move(&p, GPR_V0, GPR_K0);