GPR_A0
const unsigned r_online = GPR_A0;
uasm_i_ori(&p, GPR_A0, 0, read_c0_config() & CONF_CM_CMASK);
UASM_i_MTC0(&p, GPR_A0, scratch_vcpu[0], scratch_vcpu[1]);
UASM_i_ADDIU(&p, GPR_K1, GPR_A0, offsetof(struct kvm_vcpu, arch));
UASM_i_LW(&p, GPR_A0, offsetof(struct kvm, arch.gpa_mm.pgd), GPR_S0);
UASM_i_MTC0(&p, GPR_A0, C0_PWBASE);
UASM_i_LW(&p, GPR_A0,
UASM_i_MTC0(&p, GPR_A0, C0_PWBASE);
uasm_i_move(&p, GPR_A0, GPR_S0);
uasm_i_sd(buf, GPR_ZERO, off, GPR_A0);
uasm_i_sw(buf, GPR_ZERO, off, GPR_A0);
GPR_A0);
uasm_i_cache(buf, Create_Dirty_Excl_SD, off, GPR_A0);
uasm_i_cache(buf, Create_Dirty_Excl_D, off, GPR_A0);
pg_addiu(&buf, GPR_A2, GPR_A0, off);
uasm_i_ori(&buf, GPR_A2, GPR_A0, off);
pg_addiu(&buf, GPR_A0, GPR_A0, 2 * off);
uasm_il_bne(&buf, &r, GPR_A0, GPR_A2, label_clear_pref);
pg_addiu(&buf, GPR_A2, GPR_A0, pref_bias_clear_store);
pg_addiu(&buf, GPR_A0, GPR_A0, 2 * off);
uasm_il_bne(&buf, &r, GPR_A0, GPR_A2,
uasm_i_sd(buf, reg, off, GPR_A0);
uasm_i_sw(buf, reg, off, GPR_A0);
GPR_A0);
uasm_i_cache(buf, Create_Dirty_Excl_SD, off, GPR_A0);
uasm_i_cache(buf, Create_Dirty_Excl_D, off, GPR_A0);
pg_addiu(&buf, GPR_A2, GPR_A0, off);
uasm_i_ori(&buf, GPR_A2, GPR_A0, off);
pg_addiu(&buf, GPR_A0, GPR_A0, 2 * off);
uasm_il_bne(&buf, &r, GPR_A2, GPR_A0, label_copy_pref_both);
pg_addiu(&buf, GPR_A2, GPR_A0,
pg_addiu(&buf, GPR_A0, GPR_A0, 2 * off);
uasm_il_bne(&buf, &r, GPR_A2, GPR_A0,
pg_addiu(&buf, GPR_A2, GPR_A0, pref_bias_copy_store);
pg_addiu(&buf, GPR_A0, GPR_A0, 2 * off);
uasm_il_bne(&buf, &r, GPR_A2, GPR_A0,