drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c

1323

} else if ((acc_flags & AMDGPU_REGS_RLC) &&

drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c

1331

(acc_flags & AMDGPU_REGS_RLC) && write) {

drivers/gpu/drm/amd/amdgpu/soc15_common.h

111

__WREG32_SOC15_RLC__(reg, value, AMDGPU_REGS_RLC, GC_HWIP, 0)

drivers/gpu/drm/amd/amdgpu/soc15_common.h

139

__WREG32_SOC15_RLC__((adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + reg), value, AMDGPU_REGS_RLC, GC_HWIP, inst)

drivers/gpu/drm/amd/amdgpu/soc15_common.h

143

__RREG32_SOC15_RLC__(reg, AMDGPU_REGS_RLC, GC_HWIP, 0)

drivers/gpu/drm/amd/amdgpu/soc15_common.h

146

__WREG32_SOC15_RLC__(reg, value, AMDGPU_REGS_NO_KIQ | AMDGPU_REGS_RLC, hwip, 0)

drivers/gpu/drm/amd/amdgpu/soc15_common.h

149

__RREG32_SOC15_RLC__(reg, AMDGPU_REGS_NO_KIQ | AMDGPU_REGS_RLC, hwip, 0)

drivers/gpu/drm/amd/amdgpu/soc15_common.h

170

__RREG32_SOC15_RLC__(adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + reg, AMDGPU_REGS_RLC, ip##_HWIP, inst)

drivers/gpu/drm/amd/amdgpu/soc15_common.h

175

__WREG32_SOC15_RLC__(target_reg, value, AMDGPU_REGS_RLC, ip##_HWIP, inst); \

drivers/gpu/drm/amd/amdgpu/soc15_common.h

187

AMDGPU_REGS_RLC, ip##_HWIP, idx) & \

drivers/gpu/drm/amd/amdgpu/soc15_common.h

189

AMDGPU_REGS_RLC, ip##_HWIP, idx)

drivers/gpu/drm/amd/amdgpu/soc15_common.h

192

__WREG32_SOC15_RLC__((adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + reg) + offset, value, AMDGPU_REGS_RLC, ip##_HWIP, inst)

drivers/gpu/drm/amd/amdgpu/soc15_common.h

195

__RREG32_SOC15_RLC__((adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + reg) + offset, AMDGPU_REGS_RLC, ip##_HWIP, inst)