AMDGPU_MES_SCHED_PIPE
pipe == AMDGPU_MES_SCHED_PIPE ? "_2" : "1");
pipe == AMDGPU_MES_SCHED_PIPE ? "" : "1");
if (r && need_retry && pipe == AMDGPU_MES_SCHED_PIPE) {
if (pipe == AMDGPU_MES_SCHED_PIPE) {
if (adev->enable_uni_mes && adev->mes.ring[AMDGPU_MES_SCHED_PIPE].sched.ready &&
else if (pipe == AMDGPU_MES_SCHED_PIPE)
if ((pipe == AMDGPU_MES_SCHED_PIPE) &&
if (pipe == AMDGPU_MES_SCHED_PIPE) {
ring->eop_gpu_addr = adev->mes.eop_gpu_addr[AMDGPU_MES_SCHED_PIPE];
else if (pipe == AMDGPU_MES_SCHED_PIPE)
mes_v11_0_free_ucode_buffers(adev, AMDGPU_MES_SCHED_PIPE);
r = mes_v11_0_load_microcode(adev, AMDGPU_MES_SCHED_PIPE, false);
AMDGPU_MES_SCHED_PIPE, true);
r = mes_v11_0_queue_init(adev, AMDGPU_MES_SCHED_PIPE);
if (pipe == AMDGPU_MES_SCHED_PIPE)
if ((adev->enable_uni_mes || pipe == AMDGPU_MES_SCHED_PIPE) &&
if (pipe == AMDGPU_MES_SCHED_PIPE) {
if (((pipe == AMDGPU_MES_SCHED_PIPE) && !adev->mes.sched_version) ||
if (pipe == AMDGPU_MES_SCHED_PIPE)
if (pipe == AMDGPU_MES_SCHED_PIPE)
if (adev->enable_uni_mes || pipe == AMDGPU_MES_SCHED_PIPE) {
mes_v12_0_free_ucode_buffers(adev, AMDGPU_MES_SCHED_PIPE);
soc21_grbm_select(adev, 3, AMDGPU_MES_SCHED_PIPE, 0, 0);
r = mes_v12_0_load_microcode(adev, AMDGPU_MES_SCHED_PIPE, false);
&adev->mes.ring[AMDGPU_MES_SCHED_PIPE],
AMDGPU_MES_SCHED_PIPE, true);
r = mes_v12_0_queue_init(adev, AMDGPU_MES_SCHED_PIPE);
r = mes_v12_0_set_hw_resources(&adev->mes, AMDGPU_MES_SCHED_PIPE);
mes_v12_0_set_hw_resources_1(&adev->mes, AMDGPU_MES_SCHED_PIPE);
r = mes_v12_0_query_sched_status(&adev->mes, AMDGPU_MES_SCHED_PIPE);
AMDGPU_MES_SCHED_PIPE,
AMDGPU_MES_SCHED_PIPE,
pipe = AMDGPU_MES_SCHED_PIPE;
pipe = AMDGPU_MES_SCHED_PIPE;
return mes_v12_0_submit_pkt_and_poll_completion(mes, AMDGPU_MES_SCHED_PIPE,
return mes_v12_0_submit_pkt_and_poll_completion(mes, AMDGPU_MES_SCHED_PIPE,
pipe = AMDGPU_MES_SCHED_PIPE;
pipe = AMDGPU_MES_SCHED_PIPE;
uint32_t mes_rev = (pipe == AMDGPU_MES_SCHED_PIPE) ?
if (pipe == AMDGPU_MES_SCHED_PIPE) {
pipe = AMDGPU_MES_SCHED_PIPE;
return mes_v12_0_submit_pkt_and_poll_completion(mes, AMDGPU_MES_SCHED_PIPE,
int r, inst = MES_PIPE_INST(xcc_id, AMDGPU_MES_SCHED_PIPE);
if ((adev->enable_uni_mes || pipe == AMDGPU_MES_SCHED_PIPE) &&
if (pipe == AMDGPU_MES_SCHED_PIPE) {
if (pipe == AMDGPU_MES_SCHED_PIPE)
if (pipe == AMDGPU_MES_SCHED_PIPE)
if (adev->enable_uni_mes || pipe == AMDGPU_MES_SCHED_PIPE) {
AMDGPU_MES_SCHED_PIPE, xcc_id);
soc_v1_0_grbm_select(adev, 3, AMDGPU_MES_SCHED_PIPE, 0, 0,
r = mes_v12_1_load_microcode(adev, AMDGPU_MES_SCHED_PIPE,
int inst = MES_PIPE_INST(xcc_id, AMDGPU_MES_SCHED_PIPE);
AMDGPU_MES_SCHED_PIPE, true, xcc_id);
r = mes_v12_1_queue_init(adev, AMDGPU_MES_SCHED_PIPE, xcc_id);
AMDGPU_MES_SCHED_PIPE, xcc_id);
AMDGPU_MES_SCHED_PIPE, xcc_id);
AMDGPU_MES_SCHED_PIPE, xcc_id);
int inst = MES_PIPE_INST(xcc_id, AMDGPU_MES_SCHED_PIPE);
xcc_id, AMDGPU_MES_SCHED_PIPE,
int inst = MES_PIPE_INST(xcc_id, AMDGPU_MES_SCHED_PIPE);
xcc_id, AMDGPU_MES_SCHED_PIPE,
pipe = AMDGPU_MES_SCHED_PIPE;
pipe = AMDGPU_MES_SCHED_PIPE;
pipe = AMDGPU_MES_SCHED_PIPE;
pipe = AMDGPU_MES_SCHED_PIPE;
pipe = AMDGPU_MES_SCHED_PIPE;
if (mes->enable_coop_mode && pipe == AMDGPU_MES_SCHED_PIPE) {
if (pipe == AMDGPU_MES_SCHED_PIPE) {
pipe = AMDGPU_MES_SCHED_PIPE;
int inst = MES_PIPE_INST(xcc_id, AMDGPU_MES_SCHED_PIPE);