AMDGPU_MAX_VCE_HANDLES
for (i = 0; i < AMDGPU_MAX_VCE_HANDLES; ++i)
for (i = 0; i < AMDGPU_MAX_VCE_HANDLES; ++i)
for (i = 0; i < AMDGPU_MAX_VCE_HANDLES; ++i) {
for (i = 0; i < AMDGPU_MAX_VCE_HANDLES; ++i)
if (i == AMDGPU_MAX_VCE_HANDLES)
for (i = 0; i < AMDGPU_MAX_VCE_HANDLES; ++i) {
for (i = 0; i < AMDGPU_MAX_VCE_HANDLES; ++i) {
for (i = 0; i < AMDGPU_MAX_VCE_HANDLES; ++i) {
atomic_t handles[AMDGPU_MAX_VCE_HANDLES];
struct drm_file *filp[AMDGPU_MAX_VCE_HANDLES];
uint32_t img_size[AMDGPU_MAX_VCE_HANDLES];
WREG32(mmVCE_VCPU_SCRATCH7, AMDGPU_MAX_VCE_HANDLES);
#define VCE_V1_0_DATA_SIZE (7808 * (AMDGPU_MAX_VCE_HANDLES + 1))
#define VCE_V2_0_DATA_SIZE (23552 * AMDGPU_MAX_VCE_HANDLES)
#define VCE_V3_0_DATA_SIZE ((16 * 1024 * AMDGPU_MAX_VCE_HANDLES) + (52 * 1024))
#define VCE_V4_0_DATA_SIZE ((16 * 1024 * AMDGPU_MAX_VCE_HANDLES) + (52 * 1024))