AMDGPU_MAX_MES_INST_PIPES
struct amdgpu_bo *ucode_fw_obj[AMDGPU_MAX_MES_INST_PIPES];
uint64_t ucode_fw_gpu_addr[AMDGPU_MAX_MES_INST_PIPES];
uint32_t *ucode_fw_ptr[AMDGPU_MAX_MES_INST_PIPES];
struct amdgpu_bo *data_fw_obj[AMDGPU_MAX_MES_INST_PIPES];
uint64_t data_fw_gpu_addr[AMDGPU_MAX_MES_INST_PIPES];
uint32_t *data_fw_ptr[AMDGPU_MAX_MES_INST_PIPES];
struct amdgpu_bo *eop_gpu_obj[AMDGPU_MAX_MES_INST_PIPES];
uint64_t eop_gpu_addr[AMDGPU_MAX_MES_INST_PIPES];
void *mqd_backup[AMDGPU_MAX_MES_INST_PIPES];
struct amdgpu_irq_src irq[AMDGPU_MAX_MES_INST_PIPES];
uint32_t sch_ctx_offs[AMDGPU_MAX_MES_INST_PIPES];
uint64_t sch_ctx_gpu_addr[AMDGPU_MAX_MES_INST_PIPES];
uint64_t *sch_ctx_ptr[AMDGPU_MAX_MES_INST_PIPES];
uint32_t query_status_fence_offs[AMDGPU_MAX_MES_INST_PIPES];
uint64_t query_status_fence_gpu_addr[AMDGPU_MAX_MES_INST_PIPES];
uint64_t *query_status_fence_ptr[AMDGPU_MAX_MES_INST_PIPES];
int master_xcc_ids[AMDGPU_MAX_MES_INST_PIPES];
struct amdgpu_bo *shared_cmd_buf_obj[AMDGPU_MAX_MES_INST_PIPES];
uint64_t shared_cmd_buf_gpu_addr[AMDGPU_MAX_MES_INST_PIPES];
struct amdgpu_ring ring[AMDGPU_MAX_MES_INST_PIPES];
spinlock_t ring_lock[AMDGPU_MAX_MES_INST_PIPES];