GICD_ICENABLER
REGISTER_DESC_WITH_BITS_PER_IRQ_SHARED(GICD_ICENABLER,
case GICD_ICENABLER:
gic_poke_irq(d, GICD_ICENABLER);
#define GICR_ICENABLER0 GICD_ICENABLER
#define GICR_ICENABLER0 GICD_ICENABLER
gicv3_write_reg(intid, GICD_ICENABLER, 32, 1, 1);
writel(~0, GICD_BASE_GVA + GICD_ICENABLER + i / 8);