GICD_ICACTIVER
REGISTER_DESC_WITH_BITS_PER_IRQ_SHARED(GICD_ICACTIVER,
case GICD_ICACTIVER:
gic_poke_irq(d, GICD_ICACTIVER);
reg = val ? GICD_ISACTIVER : GICD_ICACTIVER;
gic_poke_irq(d, GICD_ICACTIVER);
gic_poke_irq(d, GICD_ICACTIVER);
#define GICR_ICACTIVER0 GICD_ICACTIVER
#define GICR_ICACTIVER0 GICD_ICACTIVER
gicv3_write_reg(intid, GICD_ICACTIVER, 32, 1, 1);
writel(~0, GICD_BASE_GVA + GICD_ICACTIVER + i / 8);