arch/x86/include/asm/sev-common.h

16

(((unsigned long)(v) & ~GHCB_MSR_INFO_MASK) >> GHCB_DATA_LOW)

arch/x86/include/asm/sev-common.h

213

#define GHCB_RESP_CODE(v) ((v) & GHCB_MSR_INFO_MASK)

arch/x86/kvm/svm/sev.c

4253

ghcb_info = control->ghcb_gpa & GHCB_MSR_INFO_MASK;

arch/x86/kvm/svm/sev.c

4298

GHCB_MSR_INFO_MASK,

arch/x86/kvm/svm/sev.c

4315

GHCB_MSR_INFO_MASK,

arch/x86/kvm/svm/sev.c

4322

GHCB_MSR_INFO_MASK, GHCB_MSR_INFO_POS);

arch/x86/kvm/svm/sev.c

4330

set_ghcb_msr_bits(svm, GHCB_MSR_PREF_GPA_RESP, GHCB_MSR_INFO_MASK,

arch/x86/kvm/svm/sev.c

4346

set_ghcb_msr_bits(svm, GHCB_MSR_REG_GPA_RESP, GHCB_MSR_INFO_MASK,

arch/x86/kvm/svm/sev.c

4398

if (ghcb_gpa & GHCB_MSR_INFO_MASK)

arch/x86/kvm/svm/sev.c

4803

GHCB_MSR_INFO_MASK,